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11.发明授权Thin film transistor, thin film transistor array substrate, and method for making the same 有权薄膜晶体管，薄膜晶体管阵列基板及其制造方法公开(公告)号：US09006743B2
公开(公告)日：2015-04-14
申请号：US13985603
申请日：2013-06-28
Inventor： Jingfeng Xue
IPC: H01L29/786 , H01L27/12 , H01L29/66 , H01L29/10
CPC classification number: H01L27/1222 , H01L29/1033 , H01L29/41733 , H01L29/66742 , H01L29/786 , H01L29/78696
Abstract: The present invention provides a thin film transistor including a first drain electrode, a second drain electrode, a first source electrode, and a second source electrode, wherein the first drain electrode and the first source electrode jointly define a first U-shaped channel facing toward a first direction. Wherein the second drain electrode and the second source electrode jointly define a second U-shaped channel facing a second direction which is different to the first direction, wherein the bottom width of the second U-shaped channel is larger then the bottom width of the first U-shaped channel. The present invention further provides an array substrate of the thin film transistor, and a method for making the array substrate. By way of the forgoing, short-circuit between the source electrode and the drain electrode resulted from the cleaning agent residue located in the bottom of the U-shaped channel of the thin film transistor can be avoided.
Abstract translation: 本发明提供了一种薄膜晶体管，其包括第一漏电极，第二漏电极，第一源电极和第二源电极，其中第一漏电极和第一源电极共同限定第一U形通道， 第一个方向。 其中第二漏电极和第二源电极共同限定面向与第一方向不同的第二方向的第二U形通道，其中第二U形通道的底部宽度大于第一U形通道的底部宽度 U形通道。 本发明还提供一种薄膜晶体管的阵列基板及其制造方法。 通过上述，可以避免由位于薄膜晶体管的U形通道的底部的清洁剂残渣产生的源电极和漏电极之间的短路。
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公开(公告)号：US20140347261A1
公开(公告)日：2014-11-27
申请号：US13985661
申请日：2013-06-27
Inventor： Jingfeng Xue , Je-hao Hsu
IPC: G09G3/36
CPC classification number: G09G3/3622 , G02F1/136286 , G09G3/003 , G09G3/3648 , G09G2300/0426 , G09G2320/0209
Abstract: An array substrate and a liquid crystal panel are disclosed. The first scanning line is configured to turn on or off the first switch and the second switch. The data line connects to the first pixel electrode and the second pixel electrode respectively by a first switch and a second switch. The second scanning line is configured to turn on or off the third switch. The input end of the third switch connects to one of the pixel electrode. The output end of the third switch and the common electrodes are connected. With the above configuration, the aperture rate in the 2D display mode is enhanced and the cross talk in 3D display mode is reduced. In addition, the number of the data driven chips is also reduced so as the manufacturing cost.
Abstract translation: 公开了阵列基板和液晶面板。 第一扫描线被配置为打开或关闭第一开关和第二开关。 数据线分别通过第一开关和第二开关连接到第一像素电极和第二像素电极。 第二扫描线被配置为打开或关闭第三开关。 第三开关的输入端连接到像素电极之一。 连接第三开关的输出端和公共电极。 利用上述配置，2D显示模式中的开口率被增强，并且3D显示模式的串扰减少。 此外，由于制造成本，数据驱动芯片的数量也减少了。
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13.发明授权公开(公告)号：US10345946B2
公开(公告)日：2019-07-09
申请号：US14778310
申请日：2015-04-23
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor： Gui Chen , Jingfeng Xue , Shibo Zhou
IPC: G06F3/045 , G06F3/041 , G06F3/044 , G02F1/1333 , G02F1/1362
Abstract: The present disclosure relates to the technical field of display, whereby the technical problem of mura of the touch panel can be solved. In the touch panel, each first signal line, after being electrically connected with a corresponding touch electrode, further extends to one end of the touch panel far from the driving circuit, so that each touch electrode overlaps with a group of first signal lines that are connected with the column of touch electrodes including the touch electrode. The touch panel according to the present disclosure can be used in liquid crystal television, liquid crystal display device, mobile phone, tablet personal computer and other display devices.
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公开(公告)号：US09811215B2
公开(公告)日：2017-11-07
申请号：US14418616
申请日：2015-01-14
Inventor： Jingfeng Xue , Gui Chen , Xin Zhang
IPC: G06F3/044 , G06F3/041 , G02F1/1333
CPC classification number: G06F3/044 , G02F1/13338 , G06F3/0412 , G06F2203/04103
Abstract: A touch liquid crystal display panel and a method for manufacturing the same are provided. The touch liquid crystal display panel comprises a sensing layer comprising a plurality of electrode regions arranged as an array, the electrode regions being electrically isolated from one another and respectively corresponding to a plurality of pixel units of a display region, and a wiring layer comprising a plurality of wires electrically connected with a control chip. The electrode regions each are electrically connected with a corresponding wire of the wiring layer through a via hole disposed adjacent to part of sub pixels of a corresponding pixel unit, so that the control chip acquires an inductive signal of each of the electrode regions. In the present disclosure, only partial sub pixels are provided with via holes for forming electric contact of the electrode regions of the sensing layer with the wires of the wiring layer. The aperture ratio of the self-capacitive screen can be increased through reducing the number of via holes. In the meantime, the transmittance of the entire display panel can be improved.
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公开(公告)号：US09069176B1
公开(公告)日：2015-06-30
申请号：US13704637
申请日：2012-10-15
Inventor： Jehao Hsu , Chenghung Chen , Jingfeng Xue
IPC: G02F1/1335 , G02B27/22 , G02F1/13363 , G02F1/1368
CPC classification number: G02B27/22 , G02B27/2228 , G02B27/26 , G02F1/133512 , G02F1/13363 , G02F1/1368 , G02F2001/133631 , G02F2001/134345 , H04N13/337
Abstract: A liquid crystal display apparatus includes scan lines, data lines perpendicular to the scan lines, a first pixel, a second pixel adjacent to the first pixel, and a black matrix layer. The first pixel includes a first main pixel and a first sub pixel. The first main pixel and the first sub pixel are arranged along a direction of the scan line. The second pixel includes a second main pixel and a second sub pixel. The second main pixel and the second sub pixel are arranged along the direction of the scan line. The black matrix layer covers the first pixel and the second pixel. The black matrix layer covers portions of the first main pixel, the first sub pixel, the second main pixel, and the second sub pixel. The first pixel and the second pixel are arranged along a direction of the data line.
Abstract translation: 液晶显示装置包括扫描线，垂直于扫描线的数据线，第一像素，与第一像素相邻的第二像素和黑矩阵层。 第一像素包括第一主像素和第一子像素。 第一主像素和第一子像素沿扫描线的方向排列。 第二像素包括第二主像素和第二子像素。 第二主像素和第二子像素沿扫描线的方向排列。 黑矩阵层覆盖第一像素和第二像素。 黑矩阵层覆盖第一主像素，第一子像素，第二主像素和第二子像素的部分。 第一像素和第二像素沿数据线的方向排列。
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Patent Agency Ranking
公开(公告)号：US09057898B2
公开(公告)日：2015-06-16
申请号：US13985818
申请日：2013-06-27
Inventor： Jingfeng Xue , Je-hao Hsu , Xiaohui Yao
IPC: G02F1/133 , G02F1/1362 , G02F1/1343 , G02F1/1368 , G02B27/22 , H01L27/12
CPC classification number: G02F1/13306 , G02B27/22 , G02F1/1343 , G02F1/134336 , G02F1/1362 , G02F1/13624 , G02F1/1368 , G02F2001/134318 , G02F2001/134345 , G09G3/003 , G09G3/3648 , G09G3/3659 , G09G2300/0426 , G09G2300/0465 , G09G2320/0209 , H01L27/124
Abstract: An array substrate and a liquid crystal display are disclosed. Each of the pixel cells includes a first, a second and a third pixel electrode, and a first, a second, a third, and a fourth switch. One corresponding scanning line are configured to turn on or off the four switches. The corresponding first data line inputs the first data signals to the first pixel electrode via the first switch. The corresponding second data line inputs the second data signals to the second pixel electrode and the third pixel electrode by the second switch and the third switch. The first end of the fourth switch connects to one of the second pixel electrode and the third pixel electrode. The second end of the fourth switch connects to the common electrode. In this way, the array substrate not only increases the aperture rate in the 2D display mode, but also decreases the cross talk effect in the 3D display mode. In addition, the number of the scanning drivers is reduced.
Abstract translation: 公开了阵列基板和液晶显示器。 每个像素单元包括第一，第二和第三像素电极，以及第一，第二，第三和第四开关。 一个相应的扫描线被配置为打开或关闭四个开关。 对应的第一数据线通过第一开关将第一数据信号输入到第一像素电极。 对应的第二数据线通过第二开关和第三开关将第二数据信号输入到第二像素电极和第三像素电极。 第四开关的第一端连接到第二像素电极和第三像素电极之一。 第四开关的第二端连接到公共电极。 以这种方式，阵列基板不仅增加了2D显示模式中的开口率，而且降低了3D显示模式中的串扰效应。 此外，减少了扫描驱动器的数量。
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公开(公告)号：US20150036069A1
公开(公告)日：2015-02-05
申请号：US14233879
申请日：2013-08-07
Inventor： Jingfeng Xue , Je-hao Hsu , Xiaohui YAO
IPC: G02F1/133 , H01L27/12 , G02F1/1343 , G02F1/1362 , G02F1/1368
CPC classification number: G02F1/13306 , G02F1/13439 , G02F1/136209 , G02F1/136213 , G02F1/136286 , G02F1/1368 , G02F2001/136222 , G09G3/36 , H01L27/124 , H01L27/1255 , H04N13/31 , H04N13/356 , H04N13/398
Abstract: The present invention provides an array substrate and a liquid crystal display panel. Wherein, in the array substrate, each pixel unit comprises a first pixel electrode, a second pixel electrode, and a third pixel electrode. And each pixel unit comprises a first control circuit and a second control circuit. The first control circuit affects the first pixel electrode, so that the first pixel electrode is under the state of displaying the image corresponding to the black screen in the 3D display mode. The second control circuit affects the second pixel electrode and the third pixel electrode to change the voltage difference between the second pixel electrode and the third pixel electrode. By the above way, the present invention can minimize the color difference in wide viewing angle, improve the opening ratio in the 2D display mode, and reduce the crosstalk of the two eyes signal in the 3D display mode. Furthermore, it can reduce the amount of the data drivers and reduce the costs.
Abstract translation: 本发明提供一种阵列基板和液晶显示面板。 其中，在阵列基板中，每个像素单元包括第一像素电极，第二像素电极和第三像素电极。 并且每个像素单元包括第一控制电路和第二控制电路。 第一控制电路影响第一像素电极，使得第一像素电极处于在3D显示模式下显示对应于黑色屏幕的图像的状态。 第二控制电路影响第二像素电极和第三像素电极，以改变第二像素电极和第三像素电极之间的电压差。 通过上述方式，本发明可以最大限度地减小广视角的色差，提高2D显示模式下的打开比，并减少3D显示模式下双眼信号的串扰。 此外，它可以减少数据驱动程序的数量并降低成本。
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18.发明申请Thin Film Transistor, Thin Film Transistor Array Substrate, and Method for Making the Same 有权薄膜晶体管，薄膜晶体管阵列基板及其制造方法公开(公告)号：US20140332817A1
公开(公告)日：2014-11-13
申请号：US13985603
申请日：2013-06-28
Inventor： Jingfeng Xue
IPC: H01L27/12 , H01L29/66 , H01L29/10 , H01L29/786
CPC classification number: H01L27/1222 , H01L29/1033 , H01L29/41733 , H01L29/66742 , H01L29/786 , H01L29/78696
Abstract: The present invention provides a thin film transistor including a first drain electrode, a second drain electrode, a first source electrode, and a second source electrode, wherein the first drain electrode and the first source electrode jointly define a first U-shaped channel facing toward a first direction. Wherein the second drain electrode and the second source electrode jointly define a second U-shaped channel facing a second direction which is different to the first direction, wherein the bottom width of the second U-shaped channel is larger then the bottom width of the first U-shaped channel. The present invention further provides an array substrate of the thin film transistor, and a method for making the array substrate. By way of the forgoing, short-circuit between the source electrode and the drain electrode resulted from the cleaning agent residue located in the bottom of the U-shaped channel of the thin film transistor can be avoided.
Abstract translation: 本发明提供了一种薄膜晶体管，其包括第一漏电极，第二漏电极，第一源电极和第二源电极，其中第一漏电极和第一源电极共同限定第一U形通道， 第一个方向。 其中第二漏电极和第二源电极共同限定面向与第一方向不同的第二方向的第二U形通道，其中第二U形通道的底部宽度大于第一U形通道的底部宽度 U形通道。 本发明还提供一种薄膜晶体管的阵列基板及其制造方法。 通过上述，可以避免由位于薄膜晶体管的U形通道的底部的清洁剂残渣产生的源电极和漏电极之间的短路。
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公开(公告)号：US09964854B2
公开(公告)日：2018-05-08
申请号：US15472233
申请日：2017-03-28
Inventor： Jingfeng Xue , Xin Zhang , Gui Chen
IPC: H01L21/67 , G03F7/20 , H01L29/786 , H01L21/223 , H01L21/265 , H01L21/266 , H01L27/12 , H01L29/66 , G02F1/1368 , H01L21/027
CPC classification number: G03F7/70058 , G02F1/1368 , G02F2202/104 , H01L21/0274 , H01L21/223 , H01L21/2652 , H01L21/266 , H01L21/67011 , H01L27/1222 , H01L27/127 , H01L27/1285 , H01L27/1288 , H01L29/66492 , H01L29/66598 , H01L29/66757 , H01L29/786 , H01L29/78621 , H01L29/78675
Abstract: A device for manufacturing an array substrate includes an exposure device for using a halftone mask to form a photoresist pattern layer on a gate insulation layer of a substrate. A polysilicon pattern layer is disposed on the substrate. A gate insulation layer covers the polysilicon pattern layer. The photoresist pattern layer includes a hollow portion corresponding to a heavily doping region of the polysilicon pattern layer, a first photoresist portion corresponding to a lightly doping region of the polysilicon pattern layer, and a second photoresist portion corresponding to an undoped region of the polysilicon pattern layer. The first photoresist portion is thinner than the second photoresist portion. A doping device is used for performing one doping process to the polysilicon pattern layer such that the heavily doping region and the lightly doping region are formed simultaneously.
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公开(公告)号：US09791728B2
公开(公告)日：2017-10-17
申请号：US14111792
申请日：2013-06-30
Inventor： Cheng Hung Chen , Jingfeng Xue
IPC: G02F1/13 , G02F1/1333 , F21V8/00
CPC classification number: G02F1/133308 , G02B6/0088 , G02F1/1303 , G02F2001/13332 , G02F2001/133322 , G02F2001/133331 , G02F2201/54
Abstract: A fixture for preventing deformation of a glass panel of a display module, for receiving and fixing a light guide plate and a glass panel. It comprises an array cell and a color filter cell. The array cell is provided with a metal routing layer. The color filter cell is provided with a color resist layer. The fixture consists and a lower fixing end, with upper ends, the array cell and the color filter cell received in the upper fixing end, while lower ends thereof received in the lower fixing end, so the color resist layer in the color filter cell and the metal routing layer in the array cell are aligned in parallel. By a gap between the glass panel and the inner side face and bottom surface, the glass panel fine tunes properly for quick recovery by virtue of its gravity when deformation occurs.
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