MEMORY DEVICE INCLUDING DISCHARGE CIRCUIT

    公开(公告)号:US20210082501A1

    公开(公告)日:2021-03-18

    申请号:US16877441

    申请日:2020-05-18

    Applicant: SK hynix Inc.

    Inventor: Hyung Dong LEE

    Abstract: A memory device includes: first conductive lines extending in a first direction; second conductive lines extending in a second direction intersecting the first direction; a plurality of memory cells disposed at intersection portions of the first conductive lines and the second conductive lines; first selection transistors respectively connected to the first conductive lines, the first selection transistors constituting a plurality of groups; and first discharge circuits respectively connected to the plurality of groups of first selection transistors, each of the first discharge circuits discharging a group of first conductive lines corresponding thereto among the first conductive lines in response to a gate control signal.

    ELECTRONIC DEVICE AND OPERATING METHOD OF ELECTRONIC DEVICE

    公开(公告)号:US20200350008A1

    公开(公告)日:2020-11-05

    申请号:US16661551

    申请日:2019-10-23

    Applicant: SK hynix Inc.

    Abstract: A semiconductor memory includes bit lines, word lines, memory cells coupled between the bit lines and the word lines, and a sensing circuit configured to sense a state of a selected memory cell. During a read operation of the selected memory cell, the electronic device is configured to precharge a selected word line to a first voltage, to precharge an unselected word line to a second voltage, to float the selected word line and the unselected word line, to apply a bit line voltage a selected bit line, to adjust a voltage level of the unselected word line using a first leakage current that flows between an unselected bit line and the unselected word line, to couple the selected word line and the unselected word line to the sensing circuit, and to compare a voltage level of the selected word line with the voltage level of the unselected word line.

    MEMORY DEVICE INCLUDING MULTIPLE DECKS

    公开(公告)号:US20230065928A1

    公开(公告)日:2023-03-02

    申请号:US18054075

    申请日:2022-11-09

    Applicant: SK hynix Inc.

    Inventor: Hyung Dong LEE

    Abstract: A memory device includes first to nth decks respectively coupled to first to nth row lines which are stacked over a substrate in a vertical direction perpendicular to a surface of the substrate, n being a positive integer, a first connection structure extending from the substrate in the vertical direction to be coupled to the first row line, even-numbered connection structures extending from the substrate in the vertical direction and respectively coupled to ends of even-numbered row lines among the second to nth row lines, and odd-numbered connection structures extending from the substrate in the vertical direction and respectively coupled to ends of odd-numbered row lines among the second to nth row lines. The even-numbered connection structures are spaced apart from the odd-numbered connection structures with the first row line and the first connection structure that are interposed between the even-numbered connection structures and the odd-numbered connection structures.

    ELECTRONIC DEVICE AND METHOD OF OPERATING THE ELECTRONIC DEVICE

    公开(公告)号:US20200350009A1

    公开(公告)日:2020-11-05

    申请号:US16669245

    申请日:2019-10-30

    Applicant: SK hynix Inc.

    Abstract: An electronic device includes a semiconductor memory. The semiconductor memory includes a bit line, a word line crossing the bit line, and a memory cell coupled to and disposed between the bit line and the word line. In a read operation, when the word line, which is in a precharged state, is floated, the bit line is driven to increase a voltage level of the bit line, and stopped when the memory cell is turned on.

    MEMORY CONTROLLER AND MEMORY SYSTEM INCLUDING THE SAME
    17.
    发明申请
    MEMORY CONTROLLER AND MEMORY SYSTEM INCLUDING THE SAME 有权
    内存控制器和存储器系统,包括它们

    公开(公告)号:US20140181449A1

    公开(公告)日:2014-06-26

    申请号:US13943912

    申请日:2013-07-17

    Applicant: SK hynix Inc.

    CPC classification number: G06F13/1631 G06F12/0207 G06F12/06 G06F12/0623

    Abstract: A memory system includes a memory unit and a memory controller. The memory unit includes a plurality of memory banks, wherein an information stored in a memory bank is accessed via a word line and a bit line. The memory controller is configured to limit repetitive accessing of a same word line or a same bit line so that the number of consecutive access is less than a predetermined critical value.

    Abstract translation: 存储器系统包括存储器单元和存储器控制器。 存储单元包括多个存储体,其中通过字线和位线访问存储在存储体中的信息。 存储器控制器被配置为限制相同字线或相同位线的重复访问,使得连续访问的数量小于预定临界值。

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