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公开(公告)号:US20170353673A1
公开(公告)日:2017-12-07
申请号:US15358737
申请日:2016-11-22
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Francois Roy
IPC: H04N5/353 , H01L27/146 , H04N5/378 , H04N5/372 , H04N5/363
CPC classification number: H04N5/353 , H01L27/14614 , H01L27/1464 , H01L27/14643 , H04N5/363 , H04N5/372 , H04N5/378
Abstract: Each pixel of a global shutter back-side illuminated image sensor includes a photosensitive area. On a front surface, a first transistor includes a vertical ring-shaped electrode penetrating into the photosensitive area and laterally delimiting a memory area. The memory area penetrates into the photosensitive area less deeply than the insulated vertical ring-shaped electrode. A read area is formed in an intermediate area which is formed in the memory area. The memory area, the intermediate area and read area define a second transistor having an insulated horizontal electrode forming a gate of the second transistor. The memory area may be formed by a first and second memory areas and an output signal is generated indicative of a difference between charge stored in the first memory area and charge stored in the second memory area after a charge transfer to the first memory area.
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公开(公告)号:US09711550B2
公开(公告)日:2017-07-18
申请号:US14840680
申请日:2015-08-31
Applicant: STMicroelectronics SA , STMicroelectronics (Crolles 2) SAS
Inventor: Laurent Favennec , Didier Dutartre , Francois Roy
IPC: H01L27/146 , H01L31/11 , H01L31/18
CPC classification number: H01L27/1462 , H01L27/1461 , H01L27/14612 , H01L27/1463 , H01L27/14685 , H01L27/14689 , H01L31/11 , H01L31/1804 , Y02E10/547 , Y02P70/521
Abstract: A method of manufacturing a pinned photodiode, including: forming a region of photon conversion into electric charges of a first conductivity type on a substrate of the second conductivity type; coating said region with a layer of a heavily-doped insulator of the second conductivity type; and annealing to ensure a dopant diffusion from the heavily-doped insulator layer.
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公开(公告)号:US09673247B2
公开(公告)日:2017-06-06
申请号:US15136569
申请日:2016-04-22
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Francois Roy , Philippe Are
IPC: H01L27/148 , H01L27/146
CPC classification number: H01L27/14607 , H01L27/1461 , H01L27/14612 , H01L27/14614 , H01L27/1463 , H01L27/14636 , H01L27/14638 , H01L27/14643 , H01L27/14812
Abstract: An image sensor includes a control circuit and pixels. Each pixel includes: a photosensitive area, a substantially rectangular storage area adjacent to the photosensitive area, and a read area. First and second insulated vertical electrodes electrically connected to each other are positioned opposite each other and delimit the storage area. The first electrode extends between the storage area and the photosensitive area. The second electrode includes a bent extension opposite a first end of the first electrode, with the storage area emerging onto the photosensitive area on the side of the first end. The control circuit operates to apply a first voltage to the first and second electrodes to perform a charge transfer, and a second voltage to block said transfer.
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公开(公告)号:US09590127B2
公开(公告)日:2017-03-07
申请号:US14335095
申请日:2014-07-18
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Francois Roy
IPC: H01L27/00 , H01L31/103 , H01L27/146 , H04N5/378
CPC classification number: H01L31/103 , H01L27/14612 , H01L27/14643 , H04N5/378
Abstract: An image sensor cell formed inside and on top of a substrate of a first conductivity type, including: a read region of the second conductivity type; and, adjacent to the read region, a storage region of the first conductivity type topped with a first insulated gate electrode. The first electrode is arranged to receive, in a first operating mode, a first voltage causing the inversion of the conductivity type of the storage region, so that the storage region behaves as an extension of the read region, and, in a second operating mode, a second voltage causing no inversion of the storage region.
Abstract translation: 在第一导电类型的衬底的内部和顶部形成的图像传感器单元,包括:第二导电类型的读取区域; 并且与读取区域相邻的第一导电类型的存储区域顶上第一绝缘栅电极。 第一电极被布置成在第一操作模式中接收导致存储区域的导电类型的反转的第一电压,使得存储区域表现为读取区域的延伸,并且在第二操作模式 ,不会导致存储区域的反转的第二电压。
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公开(公告)号:US11736826B2
公开(公告)日:2023-08-22
申请号:US16912609
申请日:2020-06-25
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Francois Roy , Thomas Dalleau
IPC: H04N25/57 , H01L27/146 , H04N25/76 , H04N25/77 , H04N25/709
CPC classification number: H04N25/57 , H01L27/14616 , H04N25/76 , H04N25/77
Abstract: A pixel includes: a detection node; a first normally on transistor connected between the detection node and a rail for applying a first potential; and a second transistor whose gate is connected to the detection node. An image sensor includes a plurality of the pixels and a control circuit configured to apply, during for a phase of initializing the detection node, the first potential to the gate of the first transistor.
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公开(公告)号:US11527570B2
公开(公告)日:2022-12-13
申请号:US17199779
申请日:2021-03-12
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Francois Roy
IPC: H01L27/148 , H04N5/372 , H01L27/146
Abstract: A charge-coupled device includes an array of insulated electrodes vertically penetrating into a semiconductor substrate. The array includes rows of alternated longitudinal and transverse electrodes. Each end of a longitudinal electrode of a row is opposite and separated from a portion of an adjacent transverse electrode of that row. Electric insulation walls extend parallel to one another and to the longitudinal electrodes. The insulation walls penetrate vertically into the substrate deeper than the longitudinal electrodes. At least two adjacent rows of electrodes are arranged between each two successive insulation walls.
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公开(公告)号:US11417789B2
公开(公告)日:2022-08-16
申请号:US16825298
申请日:2020-03-20
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Arnaud Tournier , Boris Rodrigues Goncalves , Francois Roy
IPC: H01L31/107 , H01L27/146
Abstract: An electronic device is provided that includes a photodiode. The photodiode includes a semiconductor region coupled to a node of application of a first voltage, and at least one semiconductor wall. The at least one semiconductor wall extends along at least a height of the photodiode and partially surrounds the semiconductor region.
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公开(公告)号:US10971533B2
公开(公告)日:2021-04-06
申请号:US15882482
申请日:2018-01-29
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Francois Roy
IPC: H01L27/146 , H04N5/374 , H04N5/378 , H04N5/357
Abstract: In an embodiment, an image sensor includes a semiconductor region, a first doped region disposed over the semiconductor region, a ring shaped well disposed over the first doped region and surrounding parts of the first doped region, a second doped region formed within the ring shaped well and disposed over the first doped region, and a third doped region disposed over the second doped region. The ring shaped well is defined by a conductor surrounded by an insulator. The conductor is connected to a voltage terminal. The third doped region is more heavily doped than the second doped region, which is more heavily doped than the first region, and are all of the same doping type. The first doped region and the second doped region within the ring shaped well, form a potential barrier for controlling transfer of charge carriers from the first doped region to the third doped region.
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公开(公告)号:US10951844B2
公开(公告)日:2021-03-16
申请号:US15953925
申请日:2018-04-16
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Francois Roy
IPC: G01C3/08 , H04N5/369 , H04N5/378 , H04N5/353 , H01L27/146 , G01S7/4863
Abstract: A time-of-flight detection pixel includes a photosensitive area and at least two assemblies. Each assembly includes: a charge storage area; a transfer transistor configured to control charge transfer from the photosensitive area to the charge storage area; and readout circuit configured to non-destructively measure a quantity of charges stored in the charge storage area.
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公开(公告)号:US10861997B2
公开(公告)日:2020-12-08
申请号:US16222542
申请日:2018-12-17
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Francois Roy
IPC: H01L31/113 , H01L31/0224 , H01L27/146
Abstract: A semiconductor substrate doped with a first doping type is positioned adjacent an insulated gate electrode that is biased by a gate voltage. A first region within the semiconductor substrate is doped with the first doping type and biased with a bias voltage. A second region within the semiconductor substrate is doped with a second doping type that is opposite the first doping type. Voltage application produces an electrostatic field within the semiconductor substrate causing the formation of a fully depleted region within the semiconductor substrate. The fully depleted region responds to absorption of a photon with an avalanche multiplication that produces charges that are collected at the first and second regions.
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