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公开(公告)号：US20160065148A1
公开(公告)日：2016-03-03
申请号：US14487313
申请日：2014-09-16
Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd
Inventor： Qi Yu Liu , Ru Feng Du
CPC classification number: H03F1/523 , H03F3/183 , H03F3/185 , H03F3/211 , H03F3/2171 , H03F3/2173 , H03F3/45475 , H03F2200/03 , H03F2200/462 , H03F2200/78 , H03F2203/45512 , H03F2203/45528 , H03F2203/45594
Abstract: A class-D audio amplifier incorporates an overcurrent protection scheme implementing two overcurrent thresholds to avoid a dynamic impedance drop. When output current reaches the first threshold as a result of an impedance drop across the speaker, the overcurrent protection circuitry limits the output current to the value of the first threshold, but does not shut down the circuit. The second threshold is used to detect an overcurrent condition to shut down the circuit. Current limiting logic of a first channel monitors the overcurrent condition of a second channel and controls the first channel output in response thereto. This permits the second channel output current to reach the second threshold if the circuit is experiencing a short-circuit condition. This scheme also allows the output current to drop below the first threshold if the overcurrent condition of the second channel is caused by an impedance drop across the output speaker.
Abstract translation: D类音频放大器包含实现两个过流阈值的过流保护方案，以避免动态阻抗下降。 当输出电流由于扬声器上的阻抗降低而达到第一阈值时，过电流保护电路将输出电流限制在第一阈值的值，但不关闭电路。 第二个阈值用于检测过电流状态以关闭电路。 第一通道的电流限制逻辑监视第二通道的过电流状况并响应于此控制第一通道输出。 这允许第二通道输出电流达到第二阈值，如果电路正在经历短路状态。 如果第二通道的过电流状态是由输出扬声器上的阻抗下降引起的，则该方案还允许输出电流降至低于第一阈值。
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公开(公告)号：US20150071464A1
公开(公告)日：2015-03-12
申请号：US14478531
申请日：2014-09-05
Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd.
Inventor： Ru Feng Du , Qi Yu Liu
CPC classification number: H03F1/3205 , H03F1/0205 , H03F1/305 , H03F3/183 , H03F3/185 , H03F3/187 , H03F3/211 , H03F3/2171 , H03F3/2173 , H03F3/45179 , H03F2200/03 , H03F2200/351 , H03F2203/21106 , H03F2203/45151 , H03F2203/45156 , H03G3/345 , H03G3/348 , H04R3/002
Abstract: A class D amplifier receives and amplifies a differential analog signal which is then differentially integrated. Two pulse width modulators generate pulse signals corresponding to the differentially integrated analog signal and two power units generate output pulse signals. The outputs the power units are coupled to input terminals of integrators via a resistor feedback network. An analog output unit converts the pulse signals to an output analog signal. The differential integration circuitry implements a soft transition between mute/un-mute. In mute, the integrator output is fixed. During the soft transition, the PWM outputs change slowly from a fixed 50% duty cycle to a final value to ensure that no pop noise is present in the output as a result of mode change.
Abstract translation: D类放大器接收和放大差分模拟信号，然后差分模拟信号被差分地积分。 两个脉冲宽度调制器产生对应于差分集成模拟信号的脉冲信号，两个功率单元产生输出脉冲信号。 功率单元的输出通过电阻反馈网络耦合到积分器的输入端。 模拟输出单元将脉冲信号转换为输出模拟信号。 差分积分电路实现静音/非静音之间的软转换。 静音时，积分器输出是固定的。 在软转换期间，PWM输出从固定的50％占空比缓慢变化到最终值，以确保由于模式更改导致输出中没有弹出噪声。
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公开(公告)号：US20210203293A1
公开(公告)日：2021-07-01
申请号：US17200490
申请日：2021-03-12
Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd.
Inventor： Ru Feng Du , Qi Yu Liu
IPC: H03G1/04 , H03K19/017 , H03F3/217 , H03K19/20 , H03K19/003 , H03G3/30 , H03K19/096
Abstract: In an embodiment, a class-D amplifier includes an input terminal configured to receive an input signal; a comparator having an input coupled to the input terminal; a deglitching circuit having an input coupled to an output of the comparator; and a driving circuit having an input coupled to an output of the deglitching circuit. The deglitching circuit includes a logic circuit coupled between the input of the deglitching circuit and the output of the deglitching circuit. The logic circuit is configured to receive a clock signal having the same frequency as the switching frequency of the class-D amplifier.
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公开(公告)号：US20200287507A1
公开(公告)日：2020-09-10
申请号：US16291971
申请日：2019-03-04
Applicant: STMicroelectronics (Shenzhen) R&D Co., Ltd.
Inventor： Ru Feng Du , XiangSheng Li
Abstract: In an embodiment, a class-AB amplifier includes: an output stage that includes a pair of half-bridges configured to be coupled to a load; and a current sensing circuit coupled to a first half-bridge of the pair of half-bridges. The current sensing circuit includes a resistive element and is configured to sense a load current flowing through the load by: mirroring a current flowing through a first transistor of the first half-bridge to generate a mirrored current, flowing the mirrored current through the resistive element, and sensing the load current based on a voltage of the resistive element.
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公开(公告)号：US09577579B2
公开(公告)日：2017-02-21
申请号：US15057552
申请日：2016-03-01
Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd
Inventor： Ru Feng Du , Qi Yu Liu
CPC classification number: H03F1/3205 , H03F1/0205 , H03F1/305 , H03F3/183 , H03F3/185 , H03F3/187 , H03F3/211 , H03F3/2171 , H03F3/2173 , H03F3/45179 , H03F2200/03 , H03F2200/351 , H03F2203/21106 , H03F2203/45151 , H03F2203/45156 , H03G3/345 , H03G3/348 , H04R3/002
Abstract: A class D amplifier receives and amplifies a differential analog signal which is then differentially integrated. Two pulse width modulators generate pulse signals corresponding to the differentially integrated analog signal and two power units generate output pulse signals. The outputs the power units are coupled to input terminals of integrators via a resistor feedback network. An analog output unit converts the pulse signals to an output analog signal. The differential integration circuitry implements a soft transition between mute/un-mute. In mute, the integrator output is fixed. During the soft transition, the PWM outputs change slowly from a fixed 50% duty cycle to a final value to ensure that no pop noise is present in the output as a result of mode change.
Abstract translation: D类放大器接收并放大差分模拟信号，然后差分模拟信号被差分地积分。 两个脉冲宽度调制器产生对应于差分集成模拟信号的脉冲信号，两个功率单元产生输出脉冲信号。 功率单元的输出通过电阻反馈网络耦合到积分器的输入端。 模拟输出单元将脉冲信号转换为输出模拟信号。 差分积分电路实现静音/非静音之间的软转换。 静音时，积分器输出是固定的。 在软转换期间，PWM输出从固定的50％占空比缓慢变化到最终值，以确保由于模式更改导致输出中没有弹出噪声。
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Patent Agency Ranking
公开(公告)号：US20160181988A1
公开(公告)日：2016-06-23
申请号：US15057552
申请日：2016-03-01
Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd
Inventor： Ru Feng Du , Qi Yu Liu
CPC classification number: H03F1/3205 , H03F1/0205 , H03F1/305 , H03F3/183 , H03F3/185 , H03F3/187 , H03F3/211 , H03F3/2171 , H03F3/2173 , H03F3/45179 , H03F2200/03 , H03F2200/351 , H03F2203/21106 , H03F2203/45151 , H03F2203/45156 , H03G3/345 , H03G3/348 , H04R3/002
Abstract: A class D amplifier receives and amplifies a differential analog signal which is then differentially integrated. Two pulse width modulators generate pulse signals corresponding to the differentially integrated analog signal and two power units generate output pulse signals. The outputs the power units are coupled to input terminals of integrators via a resistor feedback network. An analog output unit converts the pulse signals to an output analog signal. The differential integration circuitry implements a soft transition between mute/un-mute. In mute, the integrator output is fixed. During the soft transition, the PWM outputs change slowly from a fixed 50% duty cycle to a final value to ensure that no pop noise is present in the output as a result of mode change.
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公开(公告)号：US20160142024A1
公开(公告)日：2016-05-19
申请号：US15002589
申请日：2016-01-21
Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd
Inventor： Ru Feng Du , Qi Yu Liu
CPC classification number: H03F1/523 , H03F3/183 , H03F3/185 , H03F3/211 , H03F3/2171 , H03F3/2173 , H03F3/45475 , H03F2200/03 , H03F2200/462 , H03F2200/78 , H03F2203/45512 , H03F2203/45528 , H03F2203/45594
Abstract: A class-D audio amplifier incorporates an overcurrent protection scheme implementing two overcurrent thresholds to avoid a dynamic impedance drop. When output current reaches the first threshold as a result of an impedance drop across the speaker, the overcurrent protection circuitry limits the output current to the value of the first threshold, but does not shut down the circuit. The second threshold is used to detect an overcurrent condition to shut down the circuit. Current limiting logic of a first channel monitors the overcurrent condition of a second channel and controls the first channel output in response thereto. This permits the second channel output current to reach the second threshold if the circuit is experiencing a short-circuit condition. This scheme also allows the output current to drop below the first threshold if the overcurrent condition of the second channel is caused by an impedance drop across the output speaker.
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公开(公告)号：US09276530B1
公开(公告)日：2016-03-01
申请号：US14487313
申请日：2014-09-16
Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd
Inventor： Qi Yu Liu , Ru Feng Du
CPC classification number: H03F1/523 , H03F3/183 , H03F3/185 , H03F3/211 , H03F3/2171 , H03F3/2173 , H03F3/45475 , H03F2200/03 , H03F2200/462 , H03F2200/78 , H03F2203/45512 , H03F2203/45528 , H03F2203/45594
Abstract: A class-D audio amplifier incorporates an overcurrent protection scheme implementing two overcurrent thresholds to avoid a dynamic impedance drop. When output current reaches the first threshold as a result of an impedance drop across the speaker, the overcurrent protection circuitry limits the output current to the value of the first threshold, but does not shut down the circuit. The second threshold is used to detect an overcurrent condition to shut down the circuit. Current limiting logic of a first channel monitors the overcurrent condition of a second channel and controls the first channel output in response thereto. This permits the second channel output current to reach the second threshold if the circuit is experiencing a short-circuit condition. This scheme also allows the output current to drop below the first threshold if the overcurrent condition of the second channel is caused by an impedance drop across the output speaker.
Abstract translation: D类音频放大器包含实现两个过流阈值的过流保护方案，以避免动态阻抗下降。 当输出电流由于扬声器上的阻抗降低而达到第一阈值时，过电流保护电路将输出电流限制在第一阈值的值，但不关闭电路。 第二个阈值用于检测过电流状态以关闭电路。 第一通道的电流限制逻辑监视第二通道的过电流状况并响应于此控制第一通道输出。 这允许第二通道输出电流达到第二阈值，如果电路正在经历短路状态。 如果第二通道的过电流状态是由输出扬声器上的阻抗下降引起的，则该方案还允许输出电流降至低于第一阈值。
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公开(公告)号：US20240056046A1
公开(公告)日：2024-02-15
申请号：US18493282
申请日：2023-10-24
Applicant: STMicroelectronics (Shenzhen) R&D Co., Ltd.
Inventor： XiangSheng Li , Ru Feng Du
CPC classification number: H03G3/3005 , H03F3/187 , H04R3/00 , H04R29/00 , H03F2200/03 , H03G2201/103
Abstract: An audio amplifier includes: a buck controller configured to control an output voltage at a first supply terminal, the output voltage selected from a set including a plurality of output voltages, where the output voltage takes a settling time to settle; a first audio bridge including: a class-AB driver stage coupled to the first supply terminal, and a delay insertion circuit configured to receive a processed digital stream and provide the processed digital stream to the class-AB driver stage a delay time after receiving the processed digital stream, where the delay time is based on the settling time; and an audio amplitude detector configured to detect a first peak amplitude in the first digital audio stream, where the buck controller is configured to select a lowest output voltage from the set that is higher than the first peak amplitude plus a headroom voltage.
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公开(公告)号：US11831286B2
公开(公告)日：2023-11-28
申请号：US17241980
申请日：2021-04-27
Applicant: STMicroelectronics (Shenzhen) R & D Co. Ltd.
Inventor： XiangSheng Li , Ru Feng Du
CPC classification number: H03G3/3005 , H03F3/187 , H04R3/00 , H04R29/00 , H03F2200/03 , H03G2201/103
Abstract: An audio amplifier includes: a buck controller configured to control an output voltage at a first supply terminal, the output voltage selected from a set including a plurality of output voltages, where the output voltage takes a settling time to settle; a first audio bridge including: a class-AB driver stage coupled to the first supply terminal, and a delay insertion circuit configured to receive a processed digital stream and provide the processed digital stream to the class-AB driver stage a delay time after receiving the processed digital stream, where the delay time is based on the settling time; and an audio amplitude detector configured to detect a first peak amplitude in the first digital audio stream, where the buck controller is configured to select a lowest output voltage from the set that is higher than the first peak amplitude plus a headroom voltage.
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