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    DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME
    11.
    发明申请
    DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME 有权

    公开(公告)号：US20230053184A1

    公开(公告)日：2023-02-16

    申请号：US17831387

    申请日：2022-06-02

    Applicant: Samsung Display Co., Ltd.

    Inventor： Seul Ki KIM ,  Kap Soo YOON ,  Jae Hyun LEE ,  Seung Ha CHOI ,  Jong Bum CHOI

    IPC: H01L27/32 ,  H01L51/56

    Abstract: A display device and a method of fabricating the same, the display device including a light-blocking layer disposed on a substrate, a buffer layer disposed on the light-blocking layer, a semiconductor layer disposed on the buffer layer, a gate insulating layer disposed on the semiconductor layer, a connection pattern layer and a gate electrode disposed on the gate insulating layer and spaced apart from each other, an interlayer dielectric layer disposed on the connection pattern layer and the gate electrode, a via layer disposed on the interlayer dielectric layer, a first bridge layer and a second bridge layer disposed on the via layer, a pixel electrode disposed on the second bridge layer, and a light-emitting layer disposed on the pixel electrode. An end of the first bridge layer is connected to the light-blocking layer through the connection pattern layer, and another end thereof is connected to the semiconductor layer. The second bridge layer connects the semiconductor layer with the pixel electrode.

    DISPLAY DEVICE
    12.
    发明申请
    DISPLAY DEVICE 有权

    公开(公告)号：US20210091163A1

    公开(公告)日：2021-03-25

    申请号：US16892988

    申请日：2020-06-04

    Applicant: Samsung Display Co., LTD.

    Inventor： Seung Sok SON ,  Woo Geun LEE ,  Seul Ki KIM ,  Kap Soo YOON ,  Hyun Woong BAEK ,  Jae Hyun LEE ,  Su Jung JUNG ,  Jung Kyoung CHO ,  Seung Ha CHOI ,  June Whan CHOI

    IPC: H01L27/32 ,  G09G3/32

    Abstract: A display device includes a substrate, a first conductive layer on the substrate, the first conductive layer including a data signal line, a first insulating layer on the first conductive layer, a semiconductor layer on the first insulating layer, the semiconductor layer including a first semiconductor pattern, a second insulating layer on the semiconductor layer, and a second conductive layer on the second insulating layer, the second conductive layer including a gate electrode disposed to overlap the first semiconductor pattern, a transistor first electrode disposed to overlap a part of the first semiconductor pattern, wherein the transistor first electrode is electrically connected to the data signal line through a contact hole that penetrates the first and second insulating layers, and a transistor second electrode disposed to overlap another part of the first semiconductor pattern.

    THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME
    14.
    发明申请
    THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME 有权
    薄膜晶体管及其制造方法

    公开(公告)号：US20160218197A1

    公开(公告)日：2016-07-28

    申请号：US14956056

    申请日：2015-12-01

    Applicant: Samsung Display Co., Ltd.

    Inventor： Myung Kwan RYU ,  Ki Hwan KIM ,  Kap Soo YOON ,  Hyeon Jun LEE ,  Jeong Uk HEO

    IPC: H01L29/66 ,  H01L21/306 ,  H01L29/417 ,  H01L21/324 ,  H01L29/786 ,  H01L29/423

    CPC classification number: H01L29/66742 ,  H01L21/324 ,  H01L29/42384 ,  H01L29/66757 ,  H01L29/66969 ,  H01L29/78621 ,  H01L29/78666 ,  H01L29/78681 ,  H01L29/78684 ,  H01L29/7869

    Abstract: There are provided a method of manufacturing a thin film transistor and a display including a thin film transistor.The method of manufacturing a thin film transistor includes forming a barrier layer cm a substrate, forming a semiconductor layer on the barrier layer, forming a gate insulating layer on the semiconductor layer, forming a gate electrode on the gate insulating layer, forming an offset region on an external surface of the gate electrode through a plasma heat treatment process or an annealing process, etching, an offset region of the gate electrode, etching a gate insulating layer except for a portion of the gate insulating layer, positioned below the gate electrode, forming an interlayer insulating layer on the gate electrode, and etching, the interlayer insulating layer to form a source electrode and a drain electrode.

    Abstract translation: 提供了制造薄膜晶体管的方法和包括薄膜晶体管的显示器。 制造薄膜晶体管的方法包括在衬底上形成衬底，在阻挡层上形成半导体层，在半导体层上形成栅极绝缘层，在栅极绝缘层上形成栅电极，形成偏移区域 通过等离子体热处理工艺或退火工艺在栅电极的外表面上蚀刻栅电极的偏移区域，蚀刻位于栅电极下方的栅绝缘层以外的栅极绝缘层， 在所述栅电极上形成层间绝缘层，并蚀刻所述层间绝缘层以形成源电极和漏电极。

    DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME
    15.
    发明公开
    DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开

    公开(公告)号：US20240016011A1

    公开(公告)日：2024-01-11

    申请号：US18118746

    申请日：2023-03-08

    Applicant: Samsung Display Co., Ltd.

    Inventor： Kwang Soo LEE ,  Sho Yeon KIM ,  Hyun KIM ,  Kap Soo YOON ,  Woo Geun LEE ,  Seung Ha CHOI

    IPC: H10K59/131 ,  H10K59/12

    CPC classification number: H10K59/131 ,  H10K59/1201

    Abstract: A display device includes a first base portion, a first conductive layer comprising a lower light blocking layer on the first base portion, and a lower wiring spaced apart from the lower light blocking layer, a buffer layer disposed on the first conductive layer, a semiconductor layer disposed on the first buffer layer and comprising a first area, a second area on one side of the first area, and a third area on the other side of the first area, a gate insulating layer on the semiconductor layer, and a second conductive layer comprising a gate electrode overlapping the first area on the gate insulating layer, wherein conductivity of each of the first area and the second area is higher than conductivity of the first area, the third area is electrically connected to the lower wiring, and the second area is directly connected to the lower light blocking layer.

    THIN FILM TRANSISTOR ARRAY PANEL HAVING IMPROVED APERTURE RATIO AND METHOD OF MANUFACTURING SAME
    18.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL HAVING IMPROVED APERTURE RATIO AND METHOD OF MANUFACTURING SAME 有权
    具有改进的孔径比的薄膜晶体管阵列及其制造方法

    公开(公告)号：US20130306972A1

    公开(公告)日：2013-11-21

    申请号：US13725333

    申请日：2012-12-21

    Applicant: SAMSUNG DISPLAY CO., LTD.

    Inventor： Hye Young RYU ,  Ki Won KIM ,  Jae Woo PARK ,  Kap Soo YOON ,  Young Joo CHOI

    IPC: H01L29/786 ,  H01L33/08

    CPC classification number: H01L29/786 ,  H01L27/1225 ,  H01L27/124 ,  H01L33/08

    Abstract: A thin film transistor array panel according to an exemplary embodiment of the present invention includes: a substrate; a gate line positioned on the substrate; a gate insulating layer positioned on the gate line; a semiconductor layer positioned on the gate insulating layer and having a channel portion; a data line including a source electrode and a drain electrode, the source and drain electrodes both positioned on the semiconductor layer; a passivation layer positioned on the data line and the drain electrode and having a contact hole formed therein; and a pixel electrode positioned on the passivation layer, wherein the pixel electrode contacts the drain electrode within the contact hole, and the channel portion of the semiconductor layer and the contact hole both overlap the gate line in a plan view of the substrate.

    Abstract translation: 根据本发明的示例性实施例的薄膜晶体管阵列面板包括：基板; 位于基板上的栅极线; 位于栅极线上的栅极绝缘层; 位于所述栅极绝缘层上且具有沟道部分的半导体层; 包括源电极和漏电极的数据线，所述源极和漏极都位于所述半导体层上; 位于数据线和漏电极上并具有形成在其中的接触孔的钝化层; 位于所述钝化层上的像素电极，其中所述像素电极在所述接触孔内接触所述漏电极，并且所述半导体层的沟道部分和所述接触孔在所述衬底的平面图中与所述栅极线重叠。

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