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    Operation method of nonvolatile memory device
    12.
    发明授权
    Operation method of nonvolatile memory device 有权

    公开(公告)号：US11532365B2

    公开(公告)日：2022-12-20

    申请号：US17377141

    申请日：2021-07-15

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jae-Duk Yu ,  Sang-Wan Nam ,  Jonghoon Park ,  Ho-Jun Lee

    IPC: G11C16/08 ,  G11C16/26 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  G11C16/04

    Abstract: An operation method of a nonvolatile memory device includes receiving a read command and an address, increasing a voltage applied to an unselected word line from an off voltage to a read pass voltage during a setup phase in response to the read command, increasing a voltage applied to an unselected string selection line from the off voltage to a pre-pulse voltage during a first setup phase of the setup phase, increasing a voltage applied to an unselected ground selection line from the off voltage to the pre-pulse voltage during the first setup phase, applying a read voltage to a selected word line to read data corresponding to the address, during a sensing phase following the setup phase, and outputting the read data through data lines after the sensing phase. During the setup phase, a slope of the voltage applied to the unselected word line is varied.

    Semiconductor memory device and memory system including the same
    14.
    发明授权
    Semiconductor memory device and memory system including the same 有权

    公开(公告)号：US09852815B2

    公开(公告)日：2017-12-26

    申请号：US15296428

    申请日：2016-10-18

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Ho-Jun Lee

    IPC: G11C17/16 ,  G11C29/00 ,  G11C7/06 ,  G11C7/10

    CPC classification number: G11C29/78 ,  G11C7/06 ,  G11C7/1012 ,  G11C17/16

    Abstract: A semiconductor memory device includes a normal memory block including a plurality of normal memory cells, a redundant memory block including a plurality of redundant memory cells used to replace defective cells among the normal memory cells, a normal buffer block configured to sense and amplify data stored in the normal memory block, a redundant buffer block configured to sense and amplify data stored in the redundant memory block, a normal latch block configured to fetch data from the normal buffer block and store the data based on a normal control signal, and a redundant latch block configured to selectively fetch data from the redundant buffer block and store the data based on a redundant control signal.

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