公开(公告)号：US11784171B2

公开(公告)日：2023-10-10

申请号：US17696157

申请日：2022-03-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ae-Nee Jang ,  Inhyo Hwang

IPC: H01L25/10 ,  H01L23/31 ,  H01L23/538 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L23/00 ,  H01L25/00

CPC classification number: H01L25/105 ,  H01L21/4853 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L25/50 ,  H01L2221/68372 ,  H01L2224/214 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058

Abstract: A semiconductor device includes a first package, and a second package stacked on the first package. Each of the first and second packages includes a first redistribution substrate having a first redistribution pattern, a first semiconductor chip on the first redistribution substrate and connected to the first redistribution pattern, a first molding layer covering the first semiconductor chip on the first redistribution substrate, a first through-electrode penetrating the first molding layer so as to be connected to the first redistribution pattern, and a second through-electrode penetrating the first molding layer and not connected to the first redistribution pattern. The first redistribution pattern of the second package is electrically connected to the second through-electrode of the first package.

公开(公告)号：US20230144602A1

公开(公告)日：2023-05-11

申请号：US17977100

申请日：2022-10-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Younglyong Kim ,  Hyunsoo Chung ,  Inhyo Hwang

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L25/0657 ,  H01L23/3128 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/45 ,  H01L24/73 ,  H01L2224/29186 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06506 ,  H01L2225/06562

Abstract: The semiconductor package, includes: a package substrate; a substrate adhesive member on the package substrate; a plurality of semiconductor chips stacked on the substrate adhesive member and including first and second semiconductor chips; and a conductive connection member connecting the package substrate and the semiconductor chips, each of the semiconductor chips including a semiconductor chip body, a chip pad, an upper oxide layer comprised of a first material and covering an upper surface of the semiconductor chip body and exposing a portion of an upper surface of the chip pad, and a lower oxide layer comprised of a second material and covering a lower surface of the semiconductor chip body, wherein the upper oxide layer of the first semiconductor chip has an oxide bonding region between the first material and the second material in a first region in contact with the lower oxide layer of the second semiconductor chip.

公开(公告)号：US11329032B2

公开(公告)日：2022-05-10

申请号：US17018324

申请日：2020-09-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ae-Nee Jang ,  Inhyo Hwang

IPC: H01L25/10 ,  H01L23/31 ,  H01L23/538 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L23/00 ,  H01L25/00

Abstract: A semiconductor device includes a first package, and a second package stacked on the first package. Each of the first and second packages includes a first redistribution substrate having a first redistribution pattern, a first semiconductor chip on the first redistribution substrate and connected to the first redistribution pattern, a first molding layer covering the first semiconductor chip on the first redistribution substrate, a first through-electrode penetrating the first molding layer so as to be connected to the first redistribution pattern, and a second through-electrode penetrating the first molding layer and not connected to the first redistribution pattern. The first redistribution pattern of the second package is electrically connected to the second through-electrode of the first package.