公开(公告)号：US20190189540A1

公开(公告)日：2019-06-20

申请号：US16282682

申请日：2019-02-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin-Nam Kim ,  Tsukasa MATSUDA ,  Rak-Hwan KIM ,  Byung-Hee KIM ,  Nae-In LEE ,  Jong-Jin LEE

IPC: H01L23/485 ,  H01L21/768 ,  H01L23/498 ,  H01L23/532 ,  H01L23/522

Abstract: A semiconductor device and a method of fabricating the same are provided. The semiconductor device includes a first interlayer insulating layer including a first trench, on a substrate a first liner layer formed along a side wall and a bottom surface of the first trench and including noble metal, the noble metal belonging to one of a fifth period and a sixth period of a periodic chart that follows numbering of International Union of Pure and Applied Chemistry (IUPAC) and belonging to one of eighth to tenth groups of the periodic chart, and a first metal wire filling the first trench on the first liner layer, a top surface of the first metal wire having a convex shape toward a bottom surface of the first trench.

公开(公告)号：US09728604B2

公开(公告)日：2017-08-08

申请号：US15059438

申请日：2016-03-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin-Nam Kim ,  Rak-Hwan Kim ,  Byung-Hee Kim ,  Jong-Min Baek ,  Sang-Hoon Ahn ,  Nae-In Lee ,  Jong-Jin Lee ,  Ho-Yun Jeon ,  Eun-Ji Jung

IPC: H01L29/08 ,  H01L23/532 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H01L27/088 ,  H01L27/12

CPC classification number: H01L29/0847 ,  H01L21/7682 ,  H01L21/76834 ,  H01L21/76837 ,  H01L21/76852 ,  H01L21/76862 ,  H01L21/76885 ,  H01L23/5222 ,  H01L23/5283 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53295 ,  H01L27/0886 ,  H01L27/1211

Abstract: Semiconductor devices may include a diffusion prevention insulation pattern, a plurality of conductive patterns, a barrier layer, and an insulating interlayer. The diffusion prevention insulation pattern may be formed on a substrate, and may include a plurality of protrusions protruding upwardly therefrom. Each of the conductive patterns may be formed on each of the protrusions of the diffusion prevention insulation pattern, and may have a sidewall inclined by an angle in a range of about 80 degrees to about 135 degrees to a top surface of the substrate. The barrier layer may cover a top surface and the sidewall of each if the conductive patterns. The insulating interlayer may be formed on the diffusion prevention insulation pattern and the barrier layer, and may have an air gap between neighboring ones of the conductive patterns.

公开(公告)号：USD787764S1

公开(公告)日：2017-05-23

申请号：US29549401

申请日：2015-12-22

Applicant: Samsung Electronics Co., Ltd.

Designer： Jin-Nam Kim ,  Ji-Yeun Yoon ,  Dong-Won Chun

公开(公告)号：USD878689S1

公开(公告)日：2020-03-17

申请号：US29619132

申请日：2017-09-27

Applicant: Samsung Electronics Co., Ltd.

Designer： Jung-Ah Choi ,  Jin-Nam Kim ,  Sung-Kyung Lee ,  Eui-Ju Lee

公开(公告)号：US20170358519A1

公开(公告)日：2017-12-14

申请号：US15669280

申请日：2017-08-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin-Nam Kim ,  Tsukasa Matsuda ,  Rak-Hwan Kim ,  Byung-Hee Kim ,  Nae-In Lee ,  Jong-Jin Lee

IPC: H01L23/485 ,  H01L23/498 ,  H01L21/768 ,  H01L23/532 ,  H01L23/522

CPC classification number: H01L23/485 ,  H01L21/7684 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76882 ,  H01L23/49822 ,  H01L23/49866 ,  H01L23/5226 ,  H01L23/53209 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53276 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device and a method of fabricating the same are provided. The semiconductor device includes a first interlayer insulating layer including a first trench, on a substrate a first liner layer formed along a side wall and a bottom surface of the first trench and including noble metal, the noble metal belonging to one of a fifth period and a sixth period of a periodic chart that follows numbering of International Union of Pure and Applied Chemistry (IUPAC) and belonging to one of eighth to tenth groups of the periodic chart, and a first metal wire filling the first trench on the first liner layer, a top surface of the first metal wire having a convex shape toward a bottom suffice of the first trench.

公开(公告)号：USD794269S1

公开(公告)日：2017-08-08

申请号：US29549224

申请日：2015-12-21

Applicant: Samsung Electronics Co., Ltd.

Designer： Jin-Nam Kim ,  Ji-Yeun Yoon ,  Dong-Won Chun

公开(公告)号：USD788389S1

公开(公告)日：2017-05-30

申请号：US29548612

申请日：2015-12-15

Applicant: Samsung Electronics Co., Ltd.

Designer： Jin-Nam Kim ,  Ji-Yeun Yoon ,  Dong-Won Chun

公开(公告)号：US20170133317A1

公开(公告)日：2017-05-11

申请号：US15298855

申请日：2016-10-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Rak-Hwan KIM ,  Byung-Hee Kim ,  Jin-Nam Kim ,  Jong-Min Baek ,  Nae-In Lee ,  Eun-Ji Jung

IPC: H01L23/528 ,  H01L23/532 ,  H01L21/768 ,  H01L23/522

CPC classification number: H01L23/5283 ,  H01L21/76847 ,  H01L21/76877 ,  H01L23/53209 ,  H01L23/53238 ,  H01L23/53261 ,  H01L23/53266

Abstract: A semiconductor device and a method of fabricating the same are provided. The semiconductor device includes an interlayer insulating film, a first trench having a first width, and a second trench having a second width, the second trench including an upper portion and a lower portion, the second width being greater than the first width, a first wire substantially filling the first trench and including a first metal, and a second wire substantially filling the second trench and including a lower wire and an upper wire, the lower wire substantially filling a lower portion of the second trench and including the first metal, and the upper wire substantially filling an upper portion of the second trench and including a second metal different from the first metal.

公开(公告)号：USD979864S1

公开(公告)日：2023-02-28

申请号：US29763826

申请日：2020-12-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Designer： Jin-Nam Kim ,  Dong-Won Chun

公开(公告)号：US10734309B2

公开(公告)日：2020-08-04

申请号：US16282682

申请日：2019-02-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin-Nam Kim ,  Tsukasa Matsuda ,  Rak-Hwan Kim ,  Byung-Hee Kim ,  Nae-In Lee ,  Jong-Jin Lee

IPC: H01L23/48 ,  H01L23/485 ,  H01L21/768 ,  H01L23/498 ,  H01L23/522 ,  H01L23/532

Abstract: A semiconductor device and a method of fabricating the same are provided. The semiconductor device includes a first interlayer insulating layer including a first trench, on a substrate a first liner layer formed along a side wall and a bottom surface of the first trench and including noble metal, the noble metal belonging to one of a fifth period and a sixth period of a periodic chart that follows numbering of International Union of Pure and Applied Chemistry (IUPAC) and belonging to one of eighth to tenth groups of the periodic chart, and a first metal wire filling the first trench on the first liner layer, a top surface of the first metal wire having a convex shape toward a bottom surface of the first trench.