Multiple power management integrated circuits and apparatus having dual pin interface

    公开(公告)号:US11275394B2

    公开(公告)日:2022-03-15

    申请号:US17027946

    申请日:2020-09-22

    Abstract: Multiple power management integrated circuits (PMICs) may perform communication and power sequence operation coordination between the multiple PMICs through a communication interface connected to two signal lines using a dual pin interface. The multiple PMICs include a main PMIC configured to communicate with at least one application processor through a system interface and at least one sub-PMIC configured to communicate with the main PMIC through the communication interface. A first signal line uses a single bidirectional signaling scheme, and a power status signal PSTATUS is exchanged between the main PMIC and the at least one sub-PMIC through the first signal line. A second signal line uses a single unidirectional signaling scheme, and a power sequence control signal PIF is transmitted from the main PMIC to the at least one sub-PMIC through the second signal line.

    SYSTEM ON CHIP AND ELECTRONIC DEVICE INCLUDING THE SAME

    公开(公告)号:US20210034138A1

    公开(公告)日:2021-02-04

    申请号:US16845661

    申请日:2020-04-10

    Abstract: A system on chip (SoC) includes a first core and a second core, first and second power gating switches, and a first power switch. The first power gating switch is arranged between the first core and a first power rail that receives a first voltage, and is selectively turned on in response to a first power gating signal. The second power gating switch is arranged between the second core and a second power rail that receives a second voltage, and is selectively turned on in response to a second power gating signal. The first power switch is arranged between the first power rail and the second power rail, and is selectively turned on in response to a first power control signal to connect the first power gating switch or the second power gating switch both the first power rail and the second power rail.

    System on chip and electronic device including the same

    公开(公告)号:US12181950B2

    公开(公告)日:2024-12-31

    申请号:US17943857

    申请日:2022-09-13

    Abstract: A system on chip (SoC) includes a first core and a second core, first and second power gating switches, and a first power switch. The first power gating switch is arranged between the first core and a first power rail that receives a first voltage, and is selectively turned on in response to a first power gating signal. The second power gating switch is arranged between the second core and a second power rail that receives a second voltage, and is selectively turned on in response to a second power gating signal. The first power switch is arranged between the first power rail and the second power rail, and is selectively turned on in response to a first power control signal to connect the first power gating switch or the second power gating switch both the first power rail and the second power rail.

    Multiple power management integrated circuits and apparatus having dual pin interface

    公开(公告)号:US11604485B2

    公开(公告)日:2023-03-14

    申请号:US17665907

    申请日:2022-02-07

    Abstract: Multiple power management integrated circuits (PMICs) may perform communication and power sequence operation coordination between the multiple PMICs through a communication interface connected to two signal lines using a dual pin interface. The multiple PMICs include a main PMIC configured to communicate with at least one application processor through a system interface and at least one sub-PMIC configured to communicate with the main PMIC through the communication interface. A first signal line uses a single bidirectional signaling scheme, and a power status signal PSTATUS is exchanged between the main PMIC and the at least one sub-PMIC through the first signal line. A second signal line uses a single unidirectional signaling scheme, and a power sequence control signal PIF is transmitted from the main PMIC to the at least one sub-PMIC through the second signal line.

    Electronic apparatus and control method thereof

    公开(公告)号:US11288356B2

    公开(公告)日:2022-03-29

    申请号:US16959834

    申请日:2019-01-02

    Inventor: Junho Huh

    Abstract: An electronic apparatus is disclosed. The electronic apparatus includes a display, and a processor configured to, based on a user command for setting unlocking information being input, display a screen including a word on the display, and store information on an object drawn on the screen by a user's gesture as the unlocking information, wherein the word is configured to induce an object related to the word to be drawn on the screen.

    BACKLIGHT DRIVER, BACKLIGHT DEVICE INCLUDING THE SAME, AND OPERATING METHOD OF THE BACKLIGHT DEVICE

    公开(公告)号:US20210350754A1

    公开(公告)日:2021-11-11

    申请号:US17244369

    申请日:2021-04-29

    Abstract: A backlight device includes LED elements divided into dimming groups; a panel driver configured to output a reference current for driving the LED elements; and pixel circuits, each of which is connected to the panel driver through a common line and is respectively configured to drive first LED elements comprised in a corresponding dimming group. Each of the pixel circuits is configured to: in a first period of a frame period, obtain a reference voltage based on the reference current and store the reference voltage, in a second period of the frame period, obtain luminance data of an image displayed by the corresponding dimming group, and in a third period of the frame period, drive the first LED elements during a light emitting time corresponding to the luminance data obtained in the second period using the reference voltage stored in the first period.

    DISPLAY CONTROLLER, DISPLAY SYSTEM INCLUDING THE DISPLAY CONTROLLER, AND METHOD OF OPERATING THE DISPLAY CONTROLLER

    公开(公告)号:US20210065602A1

    公开(公告)日:2021-03-04

    申请号:US16996391

    申请日:2020-08-18

    Abstract: A display chipset structure that is based on an integrated display controller is provided. The display controller includes including a display processor comprising a first digital circuit, and configured to receive image data from an application processor (AP) and output the image data to a first component driver chip configured to drive a gate line and a source line of a display panel; and a touch processor comprising a second digital circuit, and configured to receive touch data from a second component driver chip configured to drive sensing electrodes of a touch panel. The display controller is implemented as one semiconductor chip and separated from each of the first and second component driver chips, and the display processor and the touch processor communicate with each other through an internal interconnection of the one semiconductor chip.

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