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11.发明申请公开(公告)号：US20180322923A1
公开(公告)日：2018-11-08
申请号：US16037190
申请日：2018-07-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： SANG-WAN NAM , WON-TAECK JUNG
CPC classification number: G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/24 , G11C16/26 , G11C16/3427
Abstract: A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation.
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12.发明申请公开(公告)号：US20160314840A1
公开(公告)日：2016-10-27
申请号：US15203826
申请日：2016-07-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： SANG-WAN NAM , WON-TAECK JUNG
CPC classification number: G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/24 , G11C16/26 , G11C16/3427
Abstract: A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation.
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Patent Agency Ranking
13.发明公开公开(公告)号：US20230178154A1
公开(公告)日：2023-06-08
申请号：US18103754
申请日：2023-01-31
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： WON-TAECK JUNG , SANG-WAN NAM , JINWOO PARK , JAEYONG JEONG
CPC classification number: G11C16/20 , G11C16/08 , G11C16/3427 , G11C16/0483 , G11C16/10 , H10B41/27
Abstract: A three-dimensional (3D) nonvolatile memory device includes a cell string. The cell string includes a pillar structure comprising a ground selection transistor, a plurality of memory cells, and a string selection transistor stacked vertically over a substrate. The memory cells comprise a first cell group and a second cell group stacked on the first cell group, and a horizontal width of at least a portion of the pillar structure decreases in a depth direction towards the substrate. A method of programming the memory device includes initializing a channel of a memory cell of the first cell group of the cell string through the ground selection transistor of the pillar structure, and then applying a program voltage to the memory cell of the pillar structure of the cell string.
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公开(公告)号：US20230145750A1
公开(公告)日：2023-05-11
申请号：US17706097
申请日：2022-03-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： SANG-WON PARK , WON-TAECK JUNG , HAN-JUN LEE , SU CHANG JEON
CPC classification number: G11C16/10 , G11C16/0483 , G11C16/3459
Abstract: A nonvolatile memory may include; a first memory cell array including a first selection transistor connected to a first string selection line, a second memory cell array including a second selection transistor connected to a second string selection line and spaced apart from the first string selection line by a first cutting line, and a peripheral circuit. The peripheral circuit may provide a first program voltage to the first selection transistor, provide a second program voltage to the second selection transistor different from the first program voltage, program the first selection transistor with a first threshold voltage in response to the first program voltage, and program the second selection transistor with a second threshold voltage level greater than the first threshold voltage in response to the second program voltage.
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15.发明申请公开(公告)号：US20200066347A1
公开(公告)日：2020-02-27
申请号：US16669920
申请日：2019-10-31
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： SANG-WAN NAM , WON-TAECK JUNG
Abstract: A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation.
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公开(公告)号：US20180240522A1
公开(公告)日：2018-08-23
申请号：US15957676
申请日：2018-04-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： WON-TAECK JUNG
CPC classification number: G11C16/08 , G06F3/0619 , G06F3/064 , G06F3/0659 , G06F3/0679 , G11C8/08 , G11C11/5671 , G11C16/0483 , G11C16/30 , G11C16/3427 , G11C16/3436 , H01L27/1157 , H01L27/11582
Abstract: A nonvolatile memory includes a plurality of memory blocks, a plurality of source drivers corresponding to the plurality of memory blocks, a plurality of pass transistor groups connected between the plurality of source drivers and the plurality of memory blocks, a plurality of block pass transistors connected between a plurality of block word lines and the plurality of pass transistor groups, a plurality of block decoders corresponding to a plurality of memory block groups respectively, and a block pass transistor decoder configured to control voltages of block select lines connected to the plurality of block pass transistors. The plurality of memory blocks are divided into the plurality of memory block groups. Each block decoder is configured to control voltages of block word lines, among the plurality of block word lines, connected to at least two memory blocks of a corresponding memory block group in common.
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17.发明申请公开(公告)号：US20160035431A1
公开(公告)日：2016-02-04
申请号：US14880820
申请日：2015-10-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： SANG-WAN NAM , WON-TAECK JUNG
CPC classification number: G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/24 , G11C16/26 , G11C16/3427
Abstract: A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation.
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