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公开(公告)号：US20160357481A1
公开(公告)日：2016-12-08
申请号：US15132466
申请日：2016-04-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： HEE HYUN NAM , YOUNGJIN CHO
IPC: G06F3/06
CPC classification number: G06F3/0619 , G06F3/061 , G06F3/0661 , G06F3/0688
Abstract: The nonvolatile memory module includes at least one nonvolatile memory, and a device controller including a RAM to store data exchanged between a host and the at least one nonvolatile memory and a DIMM controller to control data exchange between the RAM and the at least one nonvolatile memory. An allocation for an access area at an access to the RAM is performed during a write transaction in which data is recorded at the RAM and is released during a read transaction of the recorded data.
Abstract translation: 非易失性存储器模块包括至少一个非易失性存储器和包括RAM的设备控制器，用于存储在主机与至少一个非易失性存储器之间交换的数据，以及DIMM控制器，用于控制RAM与至少一个非易失性存储器之间的数据交换 。 在访问RAM的访问区域的分配在RAM中被记录数据的写入事务期间执行，并且在记录数据的读取事务期间被释放。
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Patent Agency Ranking
公开(公告)号：US20210081204A1
公开(公告)日：2021-03-18
申请号：US16879120
申请日：2020-05-20
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： YOUNHO JEON , YOUNGJIN CHO , HEE HYUN NAM , HYO-DEOK SHIN
Abstract: A memory module includes a device controller that communicates with a host device based on a first interface including a first clock signal, a first data signal, and a first data strobe signal and operates in one of a first operation mode or a second operation mode depending on an operation mode control value from the host device, and a memory device that communicates with the device controller based on a second interface including a second data signal and a second data strobe signal. The device controller includes a logic circuit that transmits a predetermined training result value to the host device depending on a training control value from the host device, when a training is performed on a third interface being a virtual interface recognized by the host device in the first operation mode.
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公开(公告)号：US20190354474A1
公开(公告)日：2019-11-21
申请号：US16195533
申请日：2018-11-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： HAN-JU LEE , YOUNGJIN CHO , SUNGYONG SEO , YOUNGKWANG YOO
Abstract: The nonvolatile memory module includes at least one nonvolatile memory device and a device controller configured to receive a storage command from an external device and to perform an operation corresponding to the received storage command The device controller includes a random access memory (RAM). After completing the corresponding operation, the device controller stores status information in the RAM and then transmits an alert signal to the external device.
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公开(公告)号：US20190205037A1
公开(公告)日：2019-07-04
申请号：US16298318
申请日：2019-03-11
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： HAN-JU LEE , YOUNGKWANG YOO , YOUNGJIN CHO
IPC: G06F3/06
CPC classification number: G06F3/0611 , G06F3/0656 , G06F3/0659 , G06F3/0688 , G06F13/385
Abstract: A storage device includes a data buffer, a device controller, and nonvolatile memories. The data buffer is configured to transact data from an external device. The device controller is configured to receive a command and an address from an external device, to control the data buffers, and to transact data with the data buffers. The nonvolatile memories are configured to perform write, read, and erase operations under control of the device controller. When a first link training between an external device and the data buffers is performed by the external device, the device controller performs a second link training between the device controller and a data buffer internally without control of the external device.
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公开(公告)号：US20160357665A1
公开(公告)日：2016-12-08
申请号：US15083425
申请日：2016-03-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： HAN-JU LEE , YOUNGJIN CHO , SUNGYONG SEO , YOUNGKWANG YOO
CPC classification number: G06F12/0246 , G06F12/0638 , G06F13/4282 , G06F2212/205 , G06F2212/7208
Abstract: The nonvolatile memory module includes at least one nonvolatile memory device and a device controller configured to receive a storage command from an external device and to perform an operation corresponding to the received storage command The device controller includes a random access memory (RAM). After completing the corresponding operation, the device controller stores status information in the RAM and then transmits an alert signal to the external device.
Abstract translation: 非易失性存储器模块包括至少一个非易失性存储器设备和被配置为从外部设备接收存储命令并执行与所接收的存储命令相对应的操作的设备控制器。设备控制器包括随机存取存储器（RAM）。 在完成相应的操作之后，设备控制器将状态信息存储在RAM中，然后向外部设备发送警报信号。
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公开(公告)号：US20160357454A1
公开(公告)日：2016-12-08
申请号：US15055689
申请日：2016-02-29
Applicant: Samsung Electronics Co., Ltd.
Inventor： HAN-JU LEE , YOUNGKWANG YOO , YOUNGJIN CHO
IPC: G06F3/06
CPC classification number: G06F3/0611 , G06F3/0656 , G06F3/0659 , G06F3/0688 , G06F13/385
Abstract: A storage device includes a data buffer, a device controller, and nonvolatile memories. The data buffer is configured to transact data from an external device. The device controller is configured to receive a command and an address from an external device, to control the data buffers, and to transact data with the data buffers. The nonvolatile memories are configured to perform write, read, and erase operations under control of the device controller. When a first link training between an external device and the data buffers is performed by the external device, the device controller performs a second link training between the device controller and a data buffer internally without control of the external device.
Abstract translation: 存储设备包括数据缓冲器，设备控制器和非易失性存储器。 数据缓冲区配置为从外部设备处理数据。 设备控制器被配置为从外部设备接收命令和地址，以控制数据缓冲器，并与数据缓冲器进行数据交互。 非易失性存储器被配置为在设备控制器的控制下执行写入，读取和擦除操作。 当由外部设备执行外部设备与数据缓冲器之间的第一链路训练时，设备控制器在内部对设备控制器和数据缓冲器之间执行第二链路训练，而无需外部设备的控制。
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