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公开(公告)号:US11488548B2
公开(公告)日:2022-11-01
申请号:US17373092
申请日:2021-07-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kangjoo Kim , Sugyeung Kang , Yongsik Kwak , Yongil Kwon , Sunkwon Kim , Uijong Song , Sewoong Ahn
IPC: G09G3/34
Abstract: A backlight system includes a backlight and a master driving circuit. The backlight includes a plurality of slave driving circuits and a plurality of light sources driven by the plurality of slave driving circuits, wherein the plurality of slave driving circuits are arranged in a matrix of driving rows and driving columns such that first through m-th slave driving circuits, where m is a positive integer greater than one, are arranged in each driving row of the driving rows, and the first through m-th slave driving circuits are connected in a daisy chain structure. The master driving circuit is configured to generate a plurality of input data signals, wherein each input data signal of the plurality of input data signals corresponds to the each driving row, and the each input data signal includes first through m-th packets including luminance data corresponding to the first through m-th slave driving circuits.
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公开(公告)号:US12132491B2
公开(公告)日:2024-10-29
申请号:US18074775
申请日:2022-12-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kyungho Ryu , Yongil Kwon , Kilhoon Lee , Jung-Pil Lim , Hyunwook Lim
CPC classification number: H03L7/091 , G06F1/10 , G11C7/222 , H04L7/0037 , H04L7/0087 , H04L7/033
Abstract: The present disclosure provides methods and apparatuses for correcting skew. In some embodiments, a skew correcting device includes a plurality of samplers configured to sample first data based on a plurality of data clock signals with different phases, and a plurality of edge selectors configured to determine to switch at least one data clock signal of the plurality of data clock signals to an edge clock signal according to a sampling result of the plurality of samplers.
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公开(公告)号:US12073773B2
公开(公告)日:2024-08-27
申请号:US17520890
申请日:2021-11-08
Applicant: Samsung Electronics Co., Ltd.
Inventor: Taehyeon Kwon , Yongil Kwon , Sugyeung Kang , Kangjoo Kim , Sunkwon Kim , Hyunsang Park , Yilho Lee
IPC: G09G3/32
CPC classification number: G09G3/32 , G09G2300/0842 , G09G2310/0267 , G09G2310/0286 , G09G2310/0289 , G09G2310/0297 , G09G2310/08
Abstract: A device includes a pixel array, a row driver configured to, generate a plurality of control signals, drive a plurality of rows of the pixel array using the plurality of control signals, and generate a plurality of clock signals, a row multiplexer configured to receive the plurality of clock signals, and transmit one clock signal of the plurality of clock signals, a data driver configured to transmit a plurality of data signals to the pixel array by column units, each pixel of the plurality of pixels includes, a light emitting device, a shift register configured to receive the selectively transmitted clock signal from the row multiplexer, and generate a width adjusted pulse width modulation (PWM) signal based on a desired brightness level of the light emitting device, and a transistor configured to transmit a driving current to the light emitting device based on the PWM signal.
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公开(公告)号:US20240112650A1
公开(公告)日:2024-04-04
申请号:US18199163
申请日:2023-05-18
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yong-Yun PARK , Alankyongho Kim , Hyunwook Lim , Yongil Kwon
IPC: G09G5/39
CPC classification number: G09G5/39 , G09G2300/0452 , G09G2310/0297 , G09G2340/16 , G09G2356/00
Abstract: The present disclosure provides transmitter circuits and display devices including the same. In some embodiments, the transmitter circuit includes a run length detector, a modifier, and a scrambler. The run length detector is configured to derive position information indicating a first input data related to a threshold run length from among a plurality of input data in a predetermined bit unit, when a run length of first scrambled data for the first input data meets or exceeds the threshold run length in the predetermined bit unit. The modifier is configured to generate modified input data by inverting at least one bit of the first input data based on the position information. The scrambler is configured to receive the modified input data from the modifier, and generate second scrambled data by scrambling the modified input data with scrambling information.
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公开(公告)号:US11715399B2
公开(公告)日:2023-08-01
申请号:US17701065
申请日:2022-03-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yilho Lee , Yongil Kwon , Sugyeung Kang , Tae-Hyeon Kwon , Sunkwon Kim , Hyunsang Park , Uijong Song
CPC classification number: G09G3/006 , G09G3/32 , G09G2330/12
Abstract: Disclosed is integrated circuit panel which detects fault of a driving circuit. The integrated circuit panel includes: a driving circuit array including first and second driving circuits; a data driver configured to output first and second input data signals through first and second data lines, respectively; a switch driver configured to output a switching signal through a switch line; and an error detection driver configured to receive first and second output data signals through first and second test lines, respectively, wherein, in response to the switching signal, the first and second driving circuits are configured to output the first and second output data signals, which are based on the first and second input data signal, through the first and second test lines, respectively, and the error detection driver is configured to detect a fault of the first or second driving circuit based on the first or second output data signal.
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公开(公告)号:US20220114975A1
公开(公告)日:2022-04-14
申请号:US17373092
申请日:2021-07-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kangjoo KIM , Sugyeung Kang , Yongsik Kwak , Yongil Kwon , Sunkwon Kim , Uijong Song , Sewoong Ahn
IPC: G09G3/34
Abstract: A backlight system includes a backlight and a master driving circuit. The backlight includes a plurality of slave driving circuits and a plurality of light sources driven by the plurality of slave driving circuits, wherein the plurality of slave driving circuits are arranged in a matrix of driving rows and driving columns such that first through m-th slave driving circuits, where m is a positive integer greater than one, are arranged in each driving row of the driving rows, and the first through m-th slave driving circuits are connected in a daisy chain structure. The master driving circuit is configured to generate a plurality of input data signals, wherein each input data signal of the plurality of input data signals corresponds to the each driving row, and the each input data signal includes first through m-th packets including luminance data corresponding to the first through m-th slave driving circuits
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