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    Information processing system for obtaining status data of a simplex system by a standby system of a duplex system
    12.
    发明授权
    Information processing system for obtaining status data of a simplex system by a standby system of a duplex system 失效
    用于通过双工系统的备用系统获得单工系统的状态数据的信息处理系统

    公开(公告)号：US5448720A

    公开(公告)日：1995-09-05

    申请号：US940248

    申请日：1992-09-04

    Applicant: Shiro Uriu ,  Shuji Yoshimura ,  Yoshihiro Uchida

    Inventor： Shiro Uriu ,  Shuji Yoshimura ,  Yoshihiro Uchida

    IPC: G06F11/16 ,  G06F11/20 ,  H04B1/74 ,  H04J3/14 ,  H04M3/22 ,  H04Q3/545 ,  H04J1/16

    CPC classification number: G06F11/2038 ,  G06F11/16 ,  G06F11/2028 ,  H04B1/74 ,  H04J3/14 ,  H04Q3/54558

    Abstract: An information processing system includes a simplex system and a duplex system in which at least two data transmitting systems are provided each capable of being an act system or a standby system. Each data transmitting system has a data acquiring unit. The simplex system includes a controller for controlling a selector to switch between the systems. When in a standby condition, the data acquiring unit of the respective data transmitting system in the duplex system issues an access request signal to a switching signal generating unit provided in the controller of the simplex system to request that the output of the selector be switched from the act system to the standby system in the duplex system. Upon receipt of the access request signal from the data acquiring unit in the standby system, the switching signal generating unit switches the selector to the standby system. As a result, status data acquired by the data acquiring unit in the simplex section is output to the data acquiring section in the standby system. The duplex system uses the status data to make a diagnosis of the standby system for its normality.

    Abstract translation: 信息处理系统包括单工系统和双工系统，其中提供至少两个能够作为动作系统或备用系统的数据传输系统。 每个数据发送系统具有数据获取单元。 单工系统包括用于控制选择器在系统之间切换的控制器。 当处于待机状态时，双工系统中的相应数据发送系统的数据获取单元向单工系统的控制器中提供的切换信号产生单元发出访问请求信号，以请求将选择器的输出从 该系统到双工系统中的备用系统。 在备用系统中从数据获取单元接收到访问请求信号时，切换信号生成单元将选择器切换到备用系统。 结果，将数据获取单元在单工部分中获取的状态数据输出到待机系统中的数据获取部分。 双工系统使用状态数据来对备用系统进行正常诊断。

    Virtual identifier conversion system
    13.
    发明授权
    Virtual identifier conversion system 失效
    虚拟标识符转换系统

    公开(公告)号：US5271010A

    公开(公告)日：1993-12-14

    申请号：US780108

    申请日：1991-10-21

    Applicant: Hiroshi Miyake ,  Satoshi Kakuma ,  Shuji Yoshimura ,  Naoki Aihara ,  Naoki Fukuda

    Inventor： Hiroshi Miyake ,  Satoshi Kakuma ,  Shuji Yoshimura ,  Naoki Aihara ,  Naoki Fukuda

    IPC: H04L12/947 ,  H04J3/24

    CPC classification number: H04L49/309 ,  H04L49/3009 ,  H04L49/3081

    Abstract: A virtual channel converter converts a virtual path identifier and a virtual channel identifier, e.g. in a twenty-eight (28) bit frame, attached to the header part of an incoming ATM cell on an input highway to an ATM switcher to identifiers to be attached to an outgoing ATM cell on an output highway capable of fully supporting all the combinations, two hundred fifty-six (256) for example, of a virtual path identifier and a virtual channel identifier no matter where the virtual path identifier and the virtual channel identifier are located in the twenty-eight (28) bit frame. The virtual channel converter comprises a plurality of identifier comparator units and a controller. Each of the identifier comparator units has an input identifier memory for storing an identifier attached to an ATM cell and a comparator for comparing the identifiers of an incoming ATM cell with the identifiers stored in the input identifier memory. The controller instructs respective input identifier memories to store all the values of identifiers attached to incoming ATM cells from a user to a switcher on a one-to-one basis.

    Control data transmission system
    15.
    发明授权
    Control data transmission system 失效
    控制数据传输系统

    公开(公告)号：US5532682A

    公开(公告)日：1996-07-02

    申请号：US110209

    申请日：1993-08-23

    Applicant: Masami Murayama ,  Shuji Yoshimura ,  Tetsuo Kawamata ,  Atsushi Yoshioka

    Inventor： Masami Murayama ,  Shuji Yoshimura ,  Tetsuo Kawamata ,  Atsushi Yoshioka

    IPC: H04Q3/545 ,  G05B23/02 ,  G06F13/40 ,  H04L12/00

    CPC classification number: G06F13/4018

    Abstract: A control data transmission system controls an electronic switching system with few signal lines. Control data are split into a plurality of fixed-length bit blocks. The control data sequence number specification signals identify the fixed-length bit blocks. The control data sequence number specification signals are paired with corresponding control data signals carrying the contents of one of the fixed-length bit blocks and a control data validity specification signal for validating transmission of the control data. The control data sequence number specification signals are decoded and the contents of respective bit blocks carried by the control data signals are stored according to the decoding result and the control data validity specification signal. When the contents of the fixed-length bit blocks carried by the control data signals for one unit of control data are stored, the control data are analyzed.

    Abstract translation: 控制数据传输系统控制具有很少信号线的电子交换系统。 控制数据被分割成多个固定长度位块。 控制数据序列号规范信号识别固定长度位块。 控制数据序列号指定信号与携带固定长度位块之一的内容的对应控制数据信号和用于验证控制数据传输的控制数据有效性指定信号配对。 对控制数据序列号指定信号进行解码，并且根据解码结果和控制数据有效性指定信号来存储由控制数据信号承载的各个位块的内容。 当存储由一个控制数据的控制数据信号承载的固定长度位块的内容时，分析控制数据。

    Passing cell monitoring device operated using an ATM switching unit
    16.
    发明授权
    Passing cell monitoring device operated using an ATM switching unit 失效
    通过使用ATM交换机操作的小区监控设备

    公开(公告)号：US5361251A

    公开(公告)日：1994-11-01

    申请号：US854476

    申请日：1992-03-17

    Applicant: Naoki Aihara ,  Shuji Yoshimura ,  Naoki Fukuda ,  Tadashi Hoshino

    Inventor： Naoki Aihara ,  Shuji Yoshimura ,  Naoki Fukuda ,  Tadashi Hoshino

    IPC: H04L12/70 ,  H04L12/813 ,  H04L12/56

    CPC classification number: H04L12/5602 ,  H04L2012/5636

    Abstract: It is determined whether or not a passing cell is a cell to be measured. If yes, a signal synchronous with the passing cycle of the cell is generated by a synchronous signal generator. The synchronous signal is digitally processed by a digital signal processor. Thus, each parameter related to the number of passing cells is obtained by converting the analysis based on the time axis to the area analysis based on the frequency axis.

    Abstract translation: 确定通过的细胞是否是要测量的细胞。 如果是，则由同步信号发生器产生与小区的通过周期同步的信号。 同步信号由数字信号处理器进行数字处理。 因此，通过将基于时间轴的分析转换为基于频率轴的区域分析来获得与通过的细胞数相关的每个参数。

    Transmission test system in a broadband ISDN
    17.
    发明授权
    Transmission test system in a broadband ISDN 失效
    宽带ISDN中的传输测试系统

    公开(公告)号：US5251204A

    公开(公告)日：1993-10-05

    申请号：US762338

    申请日：1991-09-19

    Applicant: Naoyuki Izawa ,  Shuji Yoshimura ,  Satoshi Kakuma

    Inventor： Naoyuki Izawa ,  Shuji Yoshimura ,  Satoshi Kakuma

    IPC: H04J3/14 ,  H04J3/16 ,  H04L12/70 ,  H04Q11/04

    CPC classification number: H04Q11/0478 ,  H04J3/14 ,  H04J3/1617 ,  H04J2203/0089 ,  H04L2012/5628 ,  H04L2012/5672

    Abstract: The present invention relates to a transmission line test method in the broadband ISDN for assembling an ATM formatted cell into a frame and sending it in the synchronous optical network (SONET) formatted transmission line as a protocol of an optical fiber communication network. First, test data are inserted into an ATM cell according to a command of the central controlling unit in an ATM switching unit. Then, the test cell is sent through an ATM switch in the ATM switching unit after the insertion of the test data; the test data are extracted from the test cell turned around by an ATM layer provided between the ATM switch and the SONET-formatted transmission line or by a subscriber terminal adapter, or from the test frame (including the test cell) turned around by a terminator in the SONET-formatted transmission line or by a network terminator at a subscriber terminal in the transmission line; and finally a transmission test is conducted by checking the data in the line up to each turnaround point.

    Abstract translation: 本发明涉及宽带ISDN中用于将ATM格式化小区组装成帧并在作为光纤通信网络的协议的同步光网络（SONET）格式化传输线路中发送它的传输线路测试方法。 首先，根据ATM交换单元中的中央控制单元的命令将测试数据插入到ATM信元中。 然后，测试单元在插入测试数据之后通过ATM交换单元中的ATM交换机发送; 从由ATM交换机和SONET格式的传输线之间提供的ATM层或由用户终端适配器或由终端器转过的测试框（包括测试单元）转移的测试单元提取测试数据 在SONET格式的传输线路中，或者由传输线路中的用户终端的网络终端器; 最后通过检查直到每个周转点的行中的数据进行传输测试。

    Input and output side conversion interfaces for an ATM exchange
    18.
    发明授权
    Input and output side conversion interfaces for an ATM exchange 失效
    用于ATM交换的输入和输出侧转换接口

    公开(公告)号：US5648963A

    公开(公告)日：1997-07-15

    申请号：US957173

    申请日：1992-10-07

    Applicant: Hiroshi Miyake ,  Yasuhiro Aso ,  Shuji Yoshimura

    Inventor： Hiroshi Miyake ,  Yasuhiro Aso ,  Shuji Yoshimura

    IPC: H04L12/931 ,  H04L12/951 ,  H04Q11/04 ,  H04L12/28

    CPC classification number: H04L12/5601 ,  H04L49/106 ,  H04L49/1553 ,  H04L49/3081 ,  H04Q11/0478 ,  H04L2012/5605 ,  H04L2012/5652

    Abstract: An ATM exchange which is comprised of a multistage cascade connection of ATM switches of self-routing module structures which are provided with a plurality of outgoing lines and incoming lines, wherein it provides at the output side and the input side of the ATM switches output side conversion interfaces and input side conversion interfaces both for connection of adjoining ATM switches and uses optical cables to connect the output side interfaces and input side interfaces facing thereto. By this, it is possible to maintain the correct exchange operation even if the length of the transfer lines (outgoing lines and incoming lines) laid between ATM switches becomes greater along with extension of the ATM switches in the exchange.

    Abstract translation: 一种ATM交换机，其由具有多条出线和输入线的自路由模块结构的ATM交换机的多级级联连接组成，其中ATM交换机在ATM交换机输出侧的输出侧和输入侧提供 转换接口和输入侧转换接口，用于连接相邻的ATM交换机，并使用光缆连接输出侧接口和面向其的输入侧接口。 由此，即使在ATM交换机之间铺设的传送线（出线和输入线）的长度随着交换机中ATM交换机的扩展而变大，也可以保持正确的交换操作。

    Procedure for switching-over systems
    19.
    发明授权
    Procedure for switching-over systems 失效
    切换系统的过程

    公开(公告)号：US5488606A

    公开(公告)日：1996-01-30

    申请号：US216149

    申请日：1994-03-21

    Applicant: Satoshi Kakuma ,  Shuji Yoshimura ,  Kazuo Hajikano ,  Masami Murayama ,  Yuzo Okuyama

    Inventor： Satoshi Kakuma ,  Shuji Yoshimura ,  Kazuo Hajikano ,  Masami Murayama ,  Yuzo Okuyama

    IPC: H04Q3/00 ,  H04L12/70 ,  H04L29/14 ,  H04L12/56

    CPC classification number: H04L49/153 ,  H04L49/552 ,  H04L69/40 ,  H04L2012/5627 ,  H04L49/1523 ,  H04L49/30

    Abstract: An ATM (asynchronous transfer mode) exchange has a buffer for system #0 and a buffer for system #1 providing P-MEM's for storing data including an A bit and for a VCI/VPI currently in use is set to "1'. Upon detecting a switchover between the systems, every B bit is reset to "0". When the exchange while changing from a master to a slave receives a cell having a slave indication and while changing from a slave to a master it receives a cell having a master indication, respective systems rewrite B bits for VCI/VPI's of respective cells to "1". In the meantime, each of the P-MEM's calculates exclusive "OR" operations between the A bit and the B bit for every VCI/VPI, and further obtains a disjunction among all the exclusive "OR" operations thus obtained. Then, when both P-MEM's obtain "0" for their respective disjunctions, cells are read out from one of the buffers in the system changing from a slave to a master. This enables the ATM exchange having a switch duplexed by mutually asynchronous active and backup systems to switchover the systems without causing a cell to be duplicated or lost.

    Abstract translation: ATM（异步传输模式）交换机具有用于系统＃0的缓冲器和用于系统＃1的缓冲器，提供用于存储包括A位的数据的P-MEM，并且当前使用的VCI / VPI被设置为“1” 检测系统之间的切换，每个B位复位为“0”，当从主机切换到从机的交换机接收到具有从机指示的单元，并且在从从机更改为主机时，接收具有 主指示，相应的系统将各单元的VCI / VPI的B位重写为“1”，同时每个P-MEM针对每个VCI / VPI计算A位和B位之间的独占“或”运算， 并且在所得到的所有排他“OR”运算中进一步获得分离，然后，当两个P-MEM对于它们各自的分离获得“0”时，从系统中的缓冲器之一读出小区从从属设备 主机，这使得ATM交换机具有通过相互异步双工的交换机 主动和备份系统切换系统，而不会导致单元被重复或丢失。

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