公开(公告)号：US20180288549A1

公开(公告)日：2018-10-04

申请号：US16001032

申请日：2018-06-06

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Jung-Huei Peng ,  Chia-Hua Chu ,  Chun-wen Cheng ,  Chin-Yi Cho ,  Li-Min Hung ,  Yao-Te Huang

IPC: H04R31/00 ,  B81C1/00 ,  H04R19/04 ,  H04R19/00

CPC classification number: H04R31/003 ,  B81C1/00158 ,  B81C2201/0125 ,  B81C2201/013 ,  B81C2201/053 ,  B81C2203/036 ,  H04R19/005 ,  H04R19/04 ,  H04R31/006 ,  H04R2201/003 ,  H04R2307/027

Abstract: The present disclosure provides one embodiment of an integrated microphone structure. The integrated microphone structure includes a first silicon substrate patterned as a first plate. A silicon oxide layer formed on one side of the first silicon substrate. A second silicon substrate bonded to the first substrate through the silicon oxide layer such that the silicon oxide layer is sandwiched between the first and second silicon substrates. A diaphragm secured on the silicon oxide layer and disposed between the first and second silicon substrates such that the first plate and the diaphragm are configured to form a capacitive microphone.

公开(公告)号：US20170326548A1

公开(公告)日：2017-11-16

申请号：US15603128

申请日：2017-05-23

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Shang-Ying Tsai ,  Li-Min Hung ,  Jung-Huei Peng

IPC: B01L3/00 ,  B32B37/30 ,  B82Y30/00

CPC classification number: B01L3/502707 ,  B01J2219/00286 ,  B01J2219/00382 ,  B01J2219/00637 ,  B01L3/502715 ,  B01L2200/12 ,  B01L2300/0636 ,  B01L2300/0877 ,  B01L2300/0887 ,  B01L2300/0896 ,  B01L2300/12 ,  B32B37/30 ,  B32B2307/412 ,  B82Y30/00

Abstract: The present disclosure provides flow cells and methods of fabricating flow cells. The method includes combining three portions: a first substrate, a second substrate, and microfluidic channels between the first substrate and the second substrate having walls of a photoresist dry film. Through-holes for inlet and outlet are formed in the first substrate or the second substrate. Patterned capture sites are stamped on the first substrate and the second substrate by a nanoimprint lithography process. In other embodiments, parts of the patterned capture sites are selectively attached to a surface chemistry pattern formed of silicon oxide islands each disposed on an outcrop of a soft bottom layer.

公开(公告)号：US09673169B2

公开(公告)日：2017-06-06

申请号：US13759201

申请日：2013-02-05

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yi-Chuan Teng ,  Jung-Huei Peng ,  Shang-Ying Tsai ,  Hsin-Ting Huang ,  Li-Min Hung ,  Yao-Te Huang ,  Chin-Yi Cho

IPC: H01L21/00 ,  H01L23/00 ,  H01L23/10

CPC classification number: H01L24/94 ,  H01L23/10 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/2745 ,  H01L2224/27452 ,  H01L2224/2746 ,  H01L2224/2761 ,  H01L2224/27616 ,  H01L2224/29011 ,  H01L2224/29012 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29124 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/83193 ,  H01L2224/83201 ,  H01L2224/83203 ,  H01L2224/94 ,  H01L2924/01322 ,  H01L2924/15787 ,  H01L2924/00 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/00012

Abstract: A wafer seal ring may be formed on a wafer having a pattern structure with a pattern density. The wafer seal ring pattern structure may include a plurality of lines having a width and a spacing that may be approximately equal to a width and a spacing of die bond rings on the wafer. The wafer having the wafer seal ring formed thereon may be bonded to a wafer that may not have a wafer seal ring. A pair of wafers may be formed with respective wafer seal rings formed in a corresponding manner. The pair of wafers may be bonded together with the wafer seal rings aligned and bonded together to form a seal ring structure between the bonded wafers.

公开(公告)号：US09352315B2

公开(公告)日：2016-05-31

申请号：US14040303

申请日：2013-09-27

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Shang-Ying Tsai ,  Li-Min Hung ,  Jung-Huei Peng

IPC: G01N15/06 ,  G01N33/00 ,  G01N33/48 ,  B82Y10/00 ,  B82Y30/00 ,  B01L3/00

CPC classification number: B01L3/502707 ,  B01J2219/00286 ,  B01J2219/00382 ,  B01J2219/00637 ,  B01L3/502715 ,  B01L2200/12 ,  B01L2300/0636 ,  B01L2300/0877 ,  B01L2300/0887 ,  B01L2300/0896 ,  B01L2300/12 ,  B32B37/30 ,  B32B2307/412 ,  B82Y30/00

Abstract: The present disclosure provides flow cells and methods of fabricating flow cells. The method includes combining three portions: a first substrate, a second substrate, and microfluidic channels between the first substrate and the second substrate having walls of a photoresist dry film. Through-holes for inlet and outlet are formed in the first substrate or the second substrate. Patterned capture sites are stamped on the first substrate and the second substrate by a nanoimprint lithography process. In other embodiments, parts of the patterned capture sites are selectively attached to a surface chemistry pattern formed of silicon oxide islands each disposed on an outcrop of a soft bottom layer.

Abstract translation: 本公开提供流动池和制造流动池的方法。 该方法包括在第一基板和具有光致抗蚀剂干膜的壁的第二基板之间组合三个部分：第一基板，第二基板和微流体通道。 用于入口和出口的通孔形成在第一衬底或第二衬底中。 图案化捕获位点通过纳米压印光刻工艺冲压在第一衬底和第二衬底上。 在其他实施例中，图案化捕获位点的部分选择性地附着到由设置在软底层的露头上的氧化硅岛形成的表面化学图案。

公开(公告)号：US09264833B2

公开(公告)日：2016-02-16

申请号：US13973812

申请日：2013-08-22

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Jung-Huei Peng ,  Chia-Hua Chu ,  Yao-Te Huang ,  Chin-Yi Cho ,  Li-Min Hung ,  Chun-Wen Cheng

IPC: H04R19/04 ,  H04R31/00 ,  H04R19/00

CPC classification number: H04R31/003 ,  B81C1/00158 ,  B81C2201/0125 ,  B81C2201/013 ,  B81C2201/053 ,  B81C2203/036 ,  H04R19/005 ,  H04R19/04 ,  H04R31/006 ,  H04R2201/003 ,  H04R2307/027

Abstract: The present disclosure provides one embodiment of an integrated microphone structure. The integrated microphone structure includes a first silicon substrate patterned as a first plate; a silicon oxide layer formed on one side of the first silicon substrate; a second silicon substrate bonded to the first substrate through the silicon oxide layer such that the silicon oxide layer is sandwiched between the first and second silicon substrates; and a diaphragm secured on the silicon oxide layer and disposed between the first and second silicon substrates, wherein the first plate and the diaphragm are configured to form a capacitive microphone.

Abstract translation: 本公开提供了集成麦克风结构的一个实施例。 集成麦克风结构包括图案化为第一板的第一硅衬底; 形成在所述第一硅衬底的一侧上的氧化硅层; 第二硅衬底，通过所述氧化硅层与所述第一衬底接合，使得所述氧化硅层夹在所述第一和第二硅衬底之间; 以及隔膜，其固定在所述氧化硅层上并且设置在所述第一和第二硅衬底之间，其中所述第一板和所述隔膜被构造成形成电容式麦克风。

公开(公告)号：US20140270272A1

公开(公告)日：2014-09-18

申请号：US13973812

申请日：2013-08-22

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Jung-Huei Peng ,  Chia-Hua Chu ,  Yao-Te Huang ,  Chin-Yi Cho ,  Li-Min Hung ,  Chun-Wen Cheng

IPC: H04R1/08

CPC classification number: H04R31/003 ,  B81C1/00158 ,  B81C2201/0125 ,  B81C2201/013 ,  B81C2201/053 ,  B81C2203/036 ,  H04R19/005 ,  H04R19/04 ,  H04R31/006 ,  H04R2201/003 ,  H04R2307/027

Abstract: The present disclosure provides one embodiment of an integrated microphone structure. The integrated microphone structure includes a first silicon substrate patterned as a first plate; a silicon oxide layer formed on one side of the first silicon substrate; a second silicon substrate bonded to the first substrate through the silicon oxide layer such that the silicon oxide layer is sandwiched between the first and second silicon substrates; and a diaphragm secured on the silicon oxide layer and disposed between the first and second silicon substrates, wherein the first plate and the diaphragm are configured to form a capacitive microphone.

Abstract translation: 本公开提供了集成麦克风结构的一个实施例。 集成麦克风结构包括图案化为第一板的第一硅衬底; 形成在所述第一硅衬底的一侧上的氧化硅层; 第二硅衬底，通过所述氧化硅层与所述第一衬底接合，使得所述氧化硅层夹在所述第一和第二硅衬底之间; 以及隔膜，其固定在所述氧化硅层上并且设置在所述第一和第二硅衬底之间，其中所述第一板和所述隔膜被构造成形成电容式麦克风。