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公开(公告)号：US10075080B1
公开(公告)日：2018-09-11
申请号：US15697275
申请日：2017-09-06
Applicant: Texas Instruments Incorporated
Inventor： Kevin Scoones , Orlando Lazaro , Alvaro Aguilar , Jeffrey Anthony Morroni , Reza Sharifi , Saurav Bandyopadhyay
CPC classification number: H02M3/1588 , H02M3/158 , H02M7/483 , H02M2001/0006
Abstract: In a described example, an apparatus includes a first switch coupled between a terminal for receiving an input voltage and a top plate node, and having a first control terminal; a second switch coupled between the top plate node and a switching node, and having a second control terminal; a third switch coupled between the switching node and a bottom plate node and having a third control terminal; a fourth switch coupled between the bottom plate node and a ground terminal, and having a fourth control terminal; a flying capacitor coupled between the top plate node and the bottom plate node; a fifth switch coupled between the top plate node and an auxiliary node; a sixth switch coupled between the auxiliary node and the bottom plate node; and an auxiliary capacitor coupled between the auxiliary control terminal and a ground terminal.
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公开(公告)号：US11996764B2
公开(公告)日：2024-05-28
申请号：US17588365
申请日：2022-01-31
Applicant: Texas Instruments Incorporated
Inventor： Alvaro Aguilar , Yutian Cui
CPC classification number: H02M1/15 , H02M1/0095 , H02M3/07 , H02M3/158
Abstract: Described embodiments include a circuit for limiting power converter output ripple. A first transistor has a first current terminal receiving an input voltage, and a second current terminal coupled to a first capacitor. A second transistor has a third current terminal coupled to the first capacitor, and a fourth current terminal is coupled to a second capacitor. A third transistor has a fifth current terminal coupled to the second capacitor, and a sixth terminal coupled to a filter input. A fourth transistor has a seventh current terminal coupled to the second current terminal, and an eighth current terminal coupled to the sixth current terminal. A fifth transistor has a ninth current terminal coupled to the fourth current terminal, and a tenth current terminal coupled to the sixth current terminal.
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公开(公告)号：US20230025078A1
公开(公告)日：2023-01-26
申请号：US17588365
申请日：2022-01-31
Applicant: Texas Instruments Incorporated
Inventor： Alvaro Aguilar , Yutian Cui
Abstract: Described embodiments include a circuit for limiting power converter output ripple. A first transistor has a first current terminal receiving an input voltage, and a second current terminal coupled to a first capacitor. A second transistor has a third current terminal coupled to the first capacitor, and a fourth current terminal is coupled to a second capacitor. A third transistor has a fifth current terminal coupled to the second capacitor, and a sixth terminal coupled to a filter input. A fourth transistor has a seventh current terminal coupled to the second current terminal, and an eighth current terminal coupled to the sixth current terminal. A fifth transistor has a ninth current terminal coupled to the fourth current terminal, and a tenth current terminal coupled to the sixth current terminal.
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公开(公告)号：US11362587B2
公开(公告)日：2022-06-14
申请号：US15858640
申请日：2017-12-29
Applicant: Texas Instruments Incorporated
Inventor： Orlando Lazaro , Kevin Scoones , Alvaro Aguilar , Jeffrey Anthony Morroni , Sombuddha Chakraborty
Abstract: In described examples of methods and control circuitry to control a multi-level power conversion system, the control circuitry generates PWM signals having a duty cycle to control an output signal. The duty cycle is adjustable in different switching cycles. States of the system's switches are adjustable in one or more intervals within the switching cycles. In response to a voltage across a capacitor of the system being outside a non-zero voltage range, the control circuitry adjusts states of the switches in two intervals to discharge or charge the capacitor in a given switching cycle.
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Patent Agency Ranking
公开(公告)号：US11101735B2
公开(公告)日：2021-08-24
申请号：US16584610
申请日：2019-09-26
Applicant: Texas Instruments Incorporated
Inventor： Kevin Scoones , Orlando Lazaro , Alvaro Aguilar , Jeffrey Anthony Morroni , Reza Sharifi , Saurav Bandyopadhyay
Abstract: In a described example, an apparatus includes a first switch coupled between a terminal for receiving an input voltage and a top plate node, and having a first control terminal; a second switch coupled between the top plate node and a switching node, and having a second control terminal; a third switch coupled between the switching node and a bottom plate node and having a third control terminal; a fourth switch coupled between the bottom plate node and a ground terminal, and having a fourth control terminal; a flying capacitor coupled between the top plate node and the bottom plate node; a fifth switch coupled between the top plate node and an auxiliary node; a sixth switch coupled between the auxiliary node and the bottom plate node; and an auxiliary capacitor coupled between the auxiliary control terminal and a ground terminal.
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16.发明授权公开(公告)号：US10651736B1
公开(公告)日：2020-05-12
申请号：US16233189
申请日：2018-12-27
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Orlando Lazaro , Alvaro Aguilar , Jeffrey Morroni , Kevin Scoones , Reza Sharifi
Abstract: A power converter device includes a set of switches configured to switch between at least three input-side voltage levels to provide output pulses. The power converter device also includes a control circuit for the set of switches, wherein the control circuit configured to selectively switch the power converter device between a continuous conduction mode of operation (CCM) having a first charge per pulse and a discontinuous conduction mode of operation (DCM) having a second charge per pulse, the second charge per pulse being greater than the first charge per pulse.
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公开(公告)号：US10439494B2
公开(公告)日：2019-10-08
申请号：US15909078
申请日：2018-03-01
Applicant: Texas Instruments Incorporated
Inventor： Reza Sharifi , Kevin Scoones , Orlando Lazaro , Alvaro Aguilar
Abstract: In described examples of methods and control circuitry to control a power conversion system, a regulator circuit is coupled to provide switching control signals according to a regulation signal to operate a plurality of converter switches to generate a voltage signal at a switching node. A compensation sense circuit is coupled to provide a compensation pulse signal having a duty cycle that represents a percentage of time that a current flowing through the switching node is above a threshold value. A current compensation circuit adjusts the regulation signal according to the compensation pulse signal.
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公开(公告)号：US20190058405A1
公开(公告)日：2019-02-21
申请号：US15858648
申请日：2017-12-29
Applicant: Texas Instruments Incorporated
Inventor： Orlando Lazaro , Kevin Scoones , Jeffrey Anthony Morroni , Alvaro Aguilar , Reza Sharifi
CPC classification number: H02M3/33569 , G05F1/575 , H02M1/08 , H02M3/06 , H02M3/158 , H02M2001/0003 , H02M2001/0009 , H03K7/08
Abstract: In described examples of methods and control circuitry to control a multi-level power conversion system with a flying capacitor, a power circuit regulates a regulator input voltage signal to provide a supply voltage signal to the control circuitry. A power switching circuit couples the regulator input to a first terminal of the flying capacitor in response to a second terminal of the flying capacitor being coupled to a reference voltage node in a given switching cycle, and couples the regulator input to the second terminal in response to the first terminal being coupled to an input node of the power conversion system in the given switching cycle.
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公开(公告)号：US20190058385A1
公开(公告)日：2019-02-21
申请号：US15858640
申请日：2017-12-29
Applicant: Texas Instruments Incorporated
Inventor： Orlando Lazaro , Kevin Scoones , Alvaro Aguilar , Jeffrey Anthony Morroni , Sombuddha Chakraborty
Abstract: In described examples of methods and control circuitry to control a multi-level power conversion system, the control circuitry generates PWM signals having a duty cycle to control an output signal. The duty cycle is adjustable in different switching cycles. States of the system's switches are adjustable in one or more intervals within the switching cycles. In response to a voltage across a capacitor of the system being outside a non-zero voltage range, the control circuitry adjusts states of the switches in two intervals to discharge or charge the capacitor in a given switching cycle.
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