公开(公告)号：US20180287602A1

公开(公告)日：2018-10-04

申请号：US16001518

申请日：2018-06-06

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Ankur Chauhan ,  Sudheer Prasad ,  Md. Abidur Rahman ,  Subrato Roy

IPC: H03K17/082 ,  H01L23/525 ,  H03K17/687 ,  G01R19/00

CPC classification number: H03K17/0822 ,  G01R19/0092 ,  H01L23/5256 ,  H03K17/687 ,  H03K2217/0027 ,  H03K2217/0054

Abstract: An apparatus includes: a first power transistor having a first current conduction path coupled between an input for receiving a supply voltage and a node and a first gate terminal coupled to a first gate control signal; a second power transistor having a second current conduction path coupled between the node and an output terminal for supplying a load current to a load; and a second gate terminal coupled to a second gate control signal; and a current sense transistor having a third gate terminal coupled to the first gate control signal, and outputting a sense current. The apparatus further includes: a differential amplifier having an output signal, and a feedback transistor having a gate terminal coupled to the output signal of the differential amplifier; and a resistor coupled between a monitor node and ground.

公开(公告)号：US11545418B2

公开(公告)日：2023-01-03

申请号：US16369795

申请日：2019-03-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Ankur Chauhan ,  Paragkumar Chaudhari ,  Vishal Gupta

IPC: H02H5/04 ,  H01L23/495 ,  H01L21/50 ,  H01L21/60

Abstract: A device includes a relative temperature detector configured to determine a temperature difference between a device temperature sensed near a switch device and an ambient temperature sensed outside the switch device. The relative temperature detector is configured to generate a relative temperature output signal based on comparing the temperature difference to a relative temperature threshold. A power detector is configured to generate a power level signal based on comparing an indication of switch power of the switch device to a power threshold. The power level signal specifies whether the indication of switch power is above or below the power threshold. A thermal capacity control is configured to disable the switch device based on the power level signal specifying that the indication of switch power is above the power threshold and based on the relative temperature output signal indicating the temperature difference is above the relative temperature threshold.

公开(公告)号：US11329472B2

公开(公告)日：2022-05-10

申请号：US16428493

申请日：2019-05-31

Applicant: Texas Instruments Incorporated

Inventor： Subrato Roy ,  Ankur Chauhan ,  Vishal Gupta

IPC: H02H1/04 ,  H02H7/20 ,  H02H3/28 ,  H02H1/00

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed for preventing undesired triggering of short circuit or over current protection. An example apparatus includes an output terminal; a voltage detection device coupled to a voltage detection input terminal and the output terminal and including a voltage detection output coupled to a logic gate first input terminal; a pulse extender coupled between a logic gate output and a selecting node; a multiplexer coupled to the selecting node and configured to be coupled to a first protection circuit, a second protection circuit, and a driver; and a switch coupled between an input terminal and the output terminal and including a switch gate terminal coupled to the driver.

公开(公告)号：US10422818B2

公开(公告)日：2019-09-24

申请号：US15859470

申请日：2017-12-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Tikno Harjono ,  Vijay Krishnamurthy ,  Min Chu ,  Kuntal Joardar ,  Gary Eugene Daum ,  Subrato Roy ,  Vinayak Hegde ,  Ankur Chauhan ,  Sathish Vallamkonda ,  Md Abidur Rahman ,  Eung Jung Kim

IPC: G01R15/14 ,  H01L27/06 ,  H03K17/567 ,  H01L25/18 ,  H01L49/02

Abstract: An electronic device comprises: a first semiconductor die; a power transistor integrated in the first semiconductor die, the power transistor comprising a gate, a first terminal, and a second terminal; a sense transistor integrated in the first semiconductor die, the sense transistor comprising a gate coupled to the gate of the power transistor, a first terminal, and a second terminal coupled to the second terminal of the power transistor; and a first resistor integrated in the first semiconductor die, the first resistor comprising a polysilicon section and a metal section coupled to the polysilicon section, the first resistor comprising a first terminal and a second terminal, wherein the first terminal of the first resistor is coupled to the first terminal of the sense transistor.

公开(公告)号：US10014851B2

公开(公告)日：2018-07-03

申请号：US15341205

申请日：2016-11-02

Applicant: Texas Instruments Incorporated

Inventor： Ankur Chauhan ,  Sudheer Prasad ,  Md. Abidur Rahman ,  Subrato Roy

IPC: H03K17/00 ,  H03K17/082 ,  H03K17/687 ,  H01L23/525 ,  G01R19/00

CPC classification number: H03K17/0822 ,  G01R19/0092 ,  H01L23/5256 ,  H03K17/687 ,  H03K2217/0027 ,  H03K2217/0054

Abstract: An apparatus includes: a first power transistor having a first current conduction path coupled between an input for receiving a supply voltage and a node and a first gate terminal coupled to a first gate control signal; a second power transistor having a second current conduction path coupled between the node and an output terminal for supplying a load current to a load; and a second gate terminal coupled to a second gate control signal; and a current sense transistor having a third gate terminal coupled to the first gate control signal, and outputting a sense current. The apparatus further includes: a differential amplifier having an output signal, and a feedback transistor having a gate terminal coupled to the output signal of the differential amplifier; and a resistor coupled between a monitor node and ground.