TRANSCEIVER WITH ASYMMETRIC MATCHING NETWORK
    11.
    发明申请
    TRANSCEIVER WITH ASYMMETRIC MATCHING NETWORK 审中-公开
    不对称匹配网络的收发器

    公开(公告)号:US20150280772A1

    公开(公告)日:2015-10-01

    申请号:US14740961

    申请日:2015-06-16

    CPC classification number: H04B1/401 H03F3/24 H04B1/0458 H04B1/18 H04B2001/0408

    Abstract: A system on a chip (SoC) includes a transceiver comprising a transmitter and a receiver, wherein at least one of the transmitter and receiver has a configurable portion that can be configured to operate in a single ended mode and in a differential mode. Two interface pins are provided for coupling the transceiver to an antenna via a matching network, wherein the two interface pins are shareably coupled to the transmitter and to the receiver. A tunable capacitor is coupled to differential signal lines of the configurable portion, wherein the tunable capacitor is configured to be tuned to optimize impedance matching of the configurable portion for each mode of operation.

    Abstract translation: 芯片上的系统(SoC)包括收发器,其包括发射器和接收器,其中发射器和接收器中的至少一个具有可配置部分,其可被配置为以单端模式和差分模式操作。 提供两个接口引脚用于通过匹配网络将收发器耦合到天线,其中两个接口引脚可共享地耦合到发射器和接收器。 可调电容器耦合到可配置部分的差分信号线,其中可调谐电容器被配置为调整以优化每个操作模式的可配置部分的阻抗匹配。

    Transceiver with asymmetric matching network
    12.
    发明授权
    Transceiver with asymmetric matching network 有权
    收发器具有不对称匹配网络

    公开(公告)号:US09088334B2

    公开(公告)日:2015-07-21

    申请号:US13748008

    申请日:2013-01-23

    CPC classification number: H04B1/401 H03F3/24 H04B1/0458 H04B1/18 H04B2001/0408

    Abstract: A system on a chip (SoC) includes a transceiver comprising a transmitter and a receiver, wherein at least one of the transmitter and receiver has a configurable portion that can be configured to operate in a single ended mode and in a differential mode. Two interface pins are provided for coupling the transceiver to an antenna via a matching network, wherein the two interface pins are shareably coupled to the transmitter and to the receiver. A tunable capacitor is coupled to differential signal lines of the configurable portion, wherein the tunable capacitor is configured to be tuned to optimize impedance matching of the configurable portion for each mode of operation.

    Abstract translation: 芯片上的系统(SoC)包括收发器,其包括发射器和接收器,其中发射器和接收器中的至少一个具有可配置部分,其可被配置为以单端模式和差分模式操作。 提供两个接口引脚用于通过匹配网络将收发器耦合到天线,其中两个接口引脚可共享地耦合到发射器和接收器。 可调电容器耦合到可配置部分的差分信号线,其中可调谐电容器被配置为调整以优化每个操作模式的可配置部分的阻抗匹配。

    Transceiver with Asymmetric Matching Network
    13.
    发明申请
    Transceiver with Asymmetric Matching Network 有权
    收发器与不对称匹配网络

    公开(公告)号:US20140206296A1

    公开(公告)日:2014-07-24

    申请号:US13748008

    申请日:2013-01-23

    CPC classification number: H04B1/401 H03F3/24 H04B1/0458 H04B1/18 H04B2001/0408

    Abstract: A system on a chip (SoC) includes a transceiver comprising a transmitter and a receiver, wherein at least one of the transmitter and receiver has a configurable portion that can be configured to operate in a single ended mode and in a differential mode. Two interface pins are provided for coupling the transceiver to an antenna via a matching network, wherein the two interface pins are shareably coupled to the transmitter and to the receiver. A tunable capacitor is coupled to differential signal lines of the configurable portion, wherein the tunable capacitor is configured to be tuned to optimize impedance matching of the configurable portion for each mode of operation.

    Abstract translation: 芯片上的系统(SoC)包括收发器,其包括发射器和接收器,其中发射器和接收器中的至少一个具有可配置部分,其可被配置为以单端模式和差分模式操作。 提供两个接口引脚用于通过匹配网络将收发器耦合到天线,其中两个接口引脚可共享地耦合到发射器和接收器。 可调电容器耦合到可配置部分的差分信号线,其中可调谐电容器被配置为调整以优化每个操作模式的可配置部分的阻抗匹配。

    HIGH DYNAMIC RANGE ASK WAKE-UP RECEIVER
    14.
    发明申请

    公开(公告)号:US20200153465A1

    公开(公告)日:2020-05-14

    申请号:US16735033

    申请日:2020-01-06

    Abstract: A wireless wake-up receiver includes multiple signal chains each signal chain being coupled to continuously receive a signal from a respective antenna and to provide a respective detected pattern at a signal chain output. Each signal chain includes a first path having a mixer-first architecture and operates in a bandpass-mode using differential signals. The wireless wake-up receiver also includes a digital correlator operable to receive the respective detected patterns and to determine whether one of the respective detected patterns is equal to a desired pattern.

    Waveform calibration using built in self test mechanism
    17.
    发明授权
    Waveform calibration using built in self test mechanism 有权
    使用内置自检机构进行波形校准

    公开(公告)号:US09176188B2

    公开(公告)日:2015-11-03

    申请号:US14137994

    申请日:2013-12-20

    Abstract: A system on a chip (SoC) includes a transceiver comprising a transmitter having a power amplifier and a receiver having a signal buffer. At least one of the transmitter and receiver has a configurable portion that can be configured to produce a range of waveforms (both in waveshape as well as duty cycle). A low cost built in self test (BIST) logic is coupled to the transceiver. The BIST logic is operable to calibrate the configurable portion of the transceiver to produce a waveform that has a selected harmonic component that has an amplitude that is less than a threshold value. Current consumed by the transceiver may be dynamically reduced by selecting an optimized waveform that has low harmonic components.

    Abstract translation: 芯片上的系统(SoC)包括收发器,包括具有功率放大器的发射机和具有信号缓冲器的接收机。 发射器和接收器中的至少一个具有可配置部分,其可被配置为产生波形范围(波形以及占空比)。 内置自检(BIST)逻辑的低成本耦合到收发器。 BIST逻辑可操作地校准收发器的可配置部分以产生具有小于阈值的幅度的选定谐波分量的波形。 可以通过选择具有低谐波分量的优化波形来动态地减少收发器消耗的电流。

    High dynamic range ask wake-up receiver

    公开(公告)号:US10574278B2

    公开(公告)日:2020-02-25

    申请号:US15350094

    申请日:2016-11-13

    Abstract: A wireless wake-up receiver includes multiple signal chains each signal chain being coupled to continuously receive a signal from a respective antenna and to provide a respective detected pattern at a signal chain output. Each signal chain includes a first path having a mixer-first architecture and operates in a bandpass-mode using differential signals. The wireless wake-up receiver also includes a digital correlator operable to receive the respective detected patterns and to determine whether one of the respective detected patterns is equal to a desired pattern.

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