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公开(公告)号：US11211940B2
公开(公告)日：2021-12-28
申请号：US16732213
申请日：2019-12-31
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Vibha Goenka , Preetam Charan Anand Tadeparthy , Vikram Gakhar , Muthusubramanian Venkateswaran , Siddaram Mathapathi
Abstract: In at least some examples, an integrated circuit includes an input pin and an analog-to-digital converter (ADC) comprising an input terminal coupled to the input pin and an output terminal. The integrated circuit further includes a logic circuit comprising an input terminal coupled to the output terminal of the ADC, a first output terminal, and a second output terminal. The integrated circuit further includes a resistance circuit. In an example, the resistance circuit includes a resistor coupled between the input pin and a first node, a first switch coupled between the first node and a reference voltage pin, and a second switch coupled between the first node and a ground pin.
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公开(公告)号：US20210242779A1
公开(公告)日：2021-08-05
申请号：US17238979
申请日：2021-04-23
Applicant: Texas Instruments Incorporated
Inventor： Kuang-Yao Cheng , Muthusubramanian Venkateswaran , Dattatreya Baragur Suryanarayana , Preetam Charan Anand Tadeparthy
Abstract: A system includes a load and a switching converter coupled to the load. The switching converter includes at least one switching module and an output inductor coupled to a switch node of each switching module. The switching converter also includes a controller coupled to each switching module, where the controller is configured to adjust a pulse clock rate and a switch on-time for each switching module. The controller comprises a pulse truncation circuit configured to detect a voltage overshoot condition and to truncate an active switch on-time pulse in response to the detected voltage overshoot condition.
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公开(公告)号：US20190131872A1
公开(公告)日：2019-05-02
申请号：US15799327
申请日：2017-10-31
Applicant: Texas Instruments Incorporated
Inventor： Kuang-Yao Cheng , Preetam Tadeparthy , Muthusubramanian Venkateswaran , Vikram Gakhar , Dattatreya Baragur Suryanarayana
Abstract: A control circuit for a DC-DC converter and a DC-DC converter are disclosed. The control circuit includes an integrator coupled to receive a first reference voltage and a first voltage that includes an output voltage for the DC-DC converter and to provide an integrated error signal. A first comparator is coupled to receive the first reference voltage and the first voltage and to provide a dynamic-integration signal that adjusts the integration time constant of the integrator.
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公开(公告)号：US11811314B2
公开(公告)日：2023-11-07
申请号：US17138484
申请日：2020-12-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Naman Bafna , Muthusubramanian Venkateswaran , Mayank Jain , Vikram Gakhar , Vikas Lakhanpal , Preetam Charan Anand Tadeparthy , Pamidi Ramasiddaiah
Abstract: In some examples, a circuit includes a state machine. The state machine is configured to operate in a first state in which the state machine gates a pulse width modulation (PWM) signal provided for control of a power converter according to a first signal provided by a voltage control loop. The state machine is configured to operate in a second state in which the state machine gates the PWM signal according to a second signal provided by a current limit comparator. The state machine is configured to transition from the first state to the second state responsive to the second signal being asserted after the first signal is asserted in a switching cycle of the power converter. The state machine is configured to transition from the current state to the first state responsive to the first signal being asserted after the second signal in a switching cycle of the power converter.
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公开(公告)号：US10996256B2
公开(公告)日：2021-05-04
申请号：US16919485
申请日：2020-07-02
Applicant: Texas Instruments Incorporated
Inventor： Sudeep Banerji , Dattatreya Baragur Suryanarayana , Vikram Gakhar , Preetam Tadeparthy , Vikas Lakhanpal , Muthusubramanian Venkateswaran , Vishnuvardhan Reddy J
Abstract: A current detection system includes an inductor and a detection circuit coupled across the inductor. The inductor is configured to receive an input signal that includes an input current and generate a voltage across the inductor. The current detection circuit includes a sensing network and a transconductance amplifier. The sensing network includes a capacitor and is configured to monitor a voltage across the inductor. The transconductance amplifier is configured to receive a differential voltage indicative of a voltage drop across the capacitor and output a differential output current proportional to the differential voltage.
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Patent Agency Ranking
公开(公告)号：US20200333390A1
公开(公告)日：2020-10-22
申请号：US16919485
申请日：2020-07-02
Applicant: Texas Instruments Incorporated
Inventor： Sudeep Banerji , Dattatreya Baragur Suryanarayana , Vikram Gakhar , Preetam Tadeparthy , Vikas Lakhanpal , Muthusubramanian Venkateswaran , Vishnuvardhan Reddy J
Abstract: A current detection system includes an inductor and a detection circuit coupled across the inductor. The inductor is configured to receive an input signal that includes an input current and generate a voltage across the inductor. The current detection circuit includes a sensing network and a transconductance amplifier. The sensing network includes a capacitor and is configured to monitor a voltage across the inductor. The transconductance amplifier is configured to receive a differential voltage indicative of a voltage drop across the capacitor and output a differential output current proportional to the differential voltage.
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公开(公告)号：US20180038913A1
公开(公告)日：2018-02-08
申请号：US15788292
申请日：2017-10-19
Applicant: Texas Instruments Incorporated
Inventor： Kushal D Murthy , Manish Parmar , Preetam Tadeparthy , Muthusubramanian Venkateswaran
IPC: G01R31/3177 , H03K19/0948 , G01R31/317 , H01L21/66 , G01R31/28
CPC classification number: G01R31/3177 , G01R31/2884 , G01R31/31723 , H01L22/14 , H01L22/34 , H03K19/0948
Abstract: An integrated circuit (IC) is provided with functional logic having a plurality of internal signal lines and test logic. The test logic has a plurality of inputs coupled to the plurality of internal signal lines and with an output coupled to a first external pin of the integrated circuit. The test logic includes a buffer, and the test logic is configured to selectively couple each of the signals received on the plurality of signal lines either directly or via the buffer to the first external pin of the IC. The test logic may be configured to selectively couple a signal received on a second external pin of the IC either via the buffer to the first external pin of the IC in order to calibrate the buffer.
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公开(公告)号：US09823306B2
公开(公告)日：2017-11-21
申请号：US15042132
申请日：2016-02-11
Applicant: Texas Instruments Incorporated
Inventor： Kushal D Murthy , Manish Parmar , Preetam Tadeparthy , Muthusubramanian Venkateswaran
IPC: G01R31/28 , G01R31/3177 , G01R31/317 , H03K19/0948 , H01L21/66
CPC classification number: G01R31/3177 , G01R31/2884 , G01R31/31723 , H01L22/14 , H01L22/34 , H03K19/0948
Abstract: An integrated circuit (IC) is provided with functional logic having a plurality of internal signal lines and test logic. The test logic has a plurality of inputs coupled to the plurality of internal signal lines and with an output coupled to a first external pin of the integrated circuit. The test logic includes a buffer, and the test logic is configured to selectively couple each of the signals received on the plurality of signal lines either directly or via the buffer to the first external pin of the IC. The test logic is configured to selectively couple a signal received on a second external pin of the IC either via the buffer to the first external pin of the IC in order to calibrate the buffer.
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公开(公告)号：US12231045B2
公开(公告)日：2025-02-18
申请号：US18539346
申请日：2023-12-14
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Bikash Kumar Pradhan , Preetam Charan Anand Tadeparthy , Muthusubramanian Venkateswaran , Venkatesh Wadeyar , Siddaram Mathapathi
Abstract: A controller includes: a pulse-width modulation (PWM) circuit; a control loop; and a reference voltage controller. The control loop has: a feedback input adapted to be coupled to an output voltage of a power stage; a control loop output coupled to a PWM control input; and an operational amplifier with a first feedback input, a first reference input, and an amplifier output, the first feedback input connected to the feedback input, and the amplifier output coupled to the PWM control input. The reference voltage controller has a reference voltage output coupled to the first reference input, the reference voltage controller configured to adjust a reference voltage provided to the reference voltage output responsive to a dynamic error estimate based on error in the operational amplifier.
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公开(公告)号：US20240039402A1
公开(公告)日：2024-02-01
申请号：US18376230
申请日：2023-10-03
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Naman Bafna , Muthusubramanian Venkateswaran , Mayank Jain , Vikram Gakhar , Vikas Lakhanpal , Preetam Charan Anand Tadeparthy , Pamidi Ramasiddaiah
Abstract: In some examples, a circuit includes a state machine. The state machine is configured to operate in a first state in which the state machine gates a pulse width modulation (PWM) signal provided for control of a power converter according to a first signal provided by a voltage control loop. The state machine is configured to operate in a second state in which the state machine gates the PWM signal according to a second signal provided by a current limit comparator. The state machine is configured to transition from the first state to the second state responsive to the second signal being asserted after the first signal is asserted in a switching cycle of the power converter. The state machine is configured to transition from the current state to the first state responsive to the first signal being asserted after the second signal in a switching cycle of the power converter.
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