公开(公告)号：US20190094276A1

公开(公告)日：2019-03-28

申请号：US16155561

申请日：2018-10-09

Applicant: Texas Instruments Incorporated

Inventor： Sandeep R. Bahl ,  Grant L. Smith ,  Daniel Ruiz Flores

IPC: G01R27/02 ,  G01R31/26 ,  G01R15/04 ,  G01R19/00

Abstract: Disclosed examples include systems to determine an on-state impedance of a high voltage transistor, and measurement circuits to measure the drain voltage of a drain terminal of the high voltage transistor during switching, including an attenuator circuit to generate an attenuator output signal representing a voltage across the high voltage transistor when the high voltage transistor is turned on, and a differential amplifier to provide an amplified sense voltage signal according to the attenuator output signal. The attenuator circuit includes a clamp transistor coupled with the drain terminal of the high voltage transistor to provide a sense signal to a first internal node, a resistive voltage divider circuit to provide the attenuator output signal based on the sense signal, and a first clamp circuit to limit the sense signal voltage when the high voltage transistor is turned off.

公开(公告)号：US20180233481A1

公开(公告)日：2018-08-16

申请号：US15947227

申请日：2018-04-06

Applicant: Texas Instruments Incorporated

Inventor： Sandeep R. Bahl ,  Michael D. Seeman

IPC: H01L23/00 ,  H01L29/40 ,  H01L29/778 ,  H01L27/085 ,  H01L29/78 ,  H01L21/8258 ,  H01L27/088 ,  H01L29/20

CPC classification number: H01L24/97 ,  H01L21/8258 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L27/085 ,  H01L27/088 ,  H01L29/2003 ,  H01L29/404 ,  H01L29/7786 ,  H01L29/78 ,  H01L2224/16145 ,  H01L2224/48137 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2224/45099 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: A high-voltage transistor (HVT) structure adapts a low-voltage transistor (LUT) to high-voltage environments. The HVT structure includes a drain node, a source node, a control gate, and a field electrode. The drain node and the source node define a conductive channel, in which mobilized charges are regulated by the control gate. While being isolated from the control gate, the field electrode is configured to spread the mobilized charges in response to a field voltage. The field electrode is structured and routed to prevent charge sharing with any one of the drain node, source node, or control gate. Advantageously, the isolated field electrode minimizes the capacitance of the control gate as well as the drain and source nodes, such that the HVT can switch with less power loss and a more robust performance in a high-voltage environment.

公开(公告)号：US20180006640A1

公开(公告)日：2018-01-04

申请号：US15702493

申请日：2017-09-12

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Michael Douglas Seeman ,  Sandeep R. Bahl ,  David I. Anderson

IPC: H03K17/082 ,  H03K3/012 ,  H03K17/10 ,  H03K17/08 ,  H02H3/00 ,  H03K17/687

CPC classification number: H03K17/0822 ,  H02H3/00 ,  H03K3/012 ,  H03K17/08 ,  H03K17/102 ,  H03K2017/0806 ,  H03K2017/6875 ,  Y10T307/766

Abstract: In described examples, a first transistor has: a drain coupled to a source of a depletion-mode transistor; a source coupled to a first voltage node; and a gate coupled to a control node. A second transistor has: a drain coupled to a gate of the depletion-mode transistor; a source coupled to the first voltage node; and a gate coupled through at least one first logic device to an input node. A third transistor has: a drain coupled to the gate of the depletion-mode transistor; a source coupled to a second voltage node; and a gate coupled through at least one second logic device to the input node.

公开(公告)号：US20170365995A1

公开(公告)日：2017-12-21

申请号：US15182696

申请日：2016-06-15

Applicant: Texas Instruments Incorporated

Inventor： Sandeep R. Bahl

IPC: H02H7/12 ,  H02M1/08 ,  H02H9/04 ,  H02M1/32 ,  H02H1/00

CPC classification number: H02H7/1213 ,  H02H1/0007 ,  H02H9/04 ,  H02M1/08 ,  H02M1/32 ,  H03K17/0822 ,  Y02B70/1483

Abstract: Disclosed examples include methods, integrated circuits and switch circuits including a driver circuit and a silicon transistor or other current source circuit coupled with a gallium nitride or other high electron mobility first transistor, where the driver operatives in a first mode to deliver a control voltage signal to the first transistor, and in a second mode in response to a detected overvoltage condition associated with the first transistor to control the current source circuit to conduct a sink current from the first transistor to affect a control voltage to at least partially turn on the first transistor.

公开(公告)号：US09762230B2

公开(公告)日：2017-09-12

申请号：US14542962

申请日：2014-11-17

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Michael Douglas Seeman ,  Sandeep R. Bahl ,  David I. Anderson

IPC: H03K17/082 ,  H03K17/08 ,  H02H3/00 ,  H03K3/012

CPC classification number: H03K17/0822 ,  H02H3/00 ,  H03K3/012 ,  H03K17/08 ,  H03K17/102 ,  H03K2017/0806 ,  H03K2017/6875 ,  Y10T307/766

Abstract: In described examples, a first transistor has: a drain coupled to a source of a depletion-mode transistor; a source coupled to a first voltage node; and a gate coupled to a control node. A second transistor has: a drain coupled to a gate of the depletion-mode transistor; a source coupled to the first voltage node; and a gate coupled through at least one first logic device to an input node. A third transistor has: a drain coupled to the gate of the depletion-mode transistor; a source coupled to a second voltage node; and a gate coupled through at least one second logic device to the input node.

公开(公告)号：US20210167767A1

公开(公告)日：2021-06-03

申请号：US17173981

申请日：2021-02-11

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Michael Douglas Seeman ,  Sandeep R. Bahl ,  David I. Anderson

IPC: H03K17/082 ,  H03K17/08 ,  H03K17/10 ,  H02H3/00 ,  H03K3/012

Abstract: In described examples, a first transistor has: a drain coupled to a source of a depletion-mode transistor; a source coupled to a first voltage node; and a gate coupled to a control node. A second transistor has: a drain coupled to a gate of the depletion-mode transistor; a source coupled to the first voltage node; and a gate coupled through at least one first logic device to an input node. A third transistor has: a drain coupled to the gate of the depletion-mode transistor; a source coupled to a second voltage node; and a gate coupled through at least one second logic device to the input node.

公开(公告)号：US20170254842A1

公开(公告)日：2017-09-07

申请号：US15058444

申请日：2016-03-02

Applicant: Texas Instruments Incorporated

Inventor： Sandeep R. Bahl ,  Grant L. Smith ,  Daniel Ruiz Flores

IPC: G01R27/02 ,  G01R15/04 ,  G01R19/00

CPC classification number: G01R27/02 ,  G01R15/04 ,  G01R19/0084 ,  G01R31/2617 ,  G01R31/2621 ,  G01R31/2639

Abstract: Disclosed examples include systems to determine an on-state impedance of a high voltage transistor, and measurement circuits to measure the drain voltage of a drain terminal of the high voltage transistor during switching, including an attenuator circuit to generate an attenuator output signal representing a voltage across the high voltage transistor when the high voltage transistor is turned on, and a differential amplifier to provide an amplified sense voltage signal according to the attenuator output signal. The attenuator circuit includes a clamp transistor coupled with the drain terminal of the high voltage transistor to provide a sense signal to a first internal node, a resistive voltage divider circuit to provide the attenuator output signal based on the sense signal, and a first clamp circuit to limit the sense signal voltage when the high voltage transistor is turned off.