Nonlinear class AB input stage
    11.
    发明授权

    公开(公告)号:US10033342B2

    公开(公告)日:2018-07-24

    申请号:US15437258

    申请日:2017-02-20

    Abstract: A circuit includes a differential input stage amplifier that receives a differential input voltage and generates an output voltage based on a difference in the differential input voltage. A feedback loop provides feedback from an output of the differential input stage amplifier to input tail current of the differential input stage amplifier. The feedback loop enables class AB operation of the differential input stage amplifier. At least one gain reducer is operatively coupled to the feedback loop to reduce the gain of the feedback loop. The gain reducer has a resistance value that varies inversely proportional to loop current in the feedback loop to reduce the gain of the feedback loop as loop current increases.

    Converter and method for extracting maximum power from piezo vibration harvester
    13.
    发明授权
    Converter and method for extracting maximum power from piezo vibration harvester 有权
    用于从压电振动收割机中提取最大功率的转换器和方法

    公开(公告)号:US09112374B2

    公开(公告)日:2015-08-18

    申请号:US14163861

    申请日:2014-01-24

    Inventor: Vadim V. Ivanov

    Abstract: A system (1-2) for efficiently transferring harvested vibration energy to a battery (6) includes a piezo harvester (2) generating an AC output voltage (VP(t)) and current (IPZ(t)) and an active rectifier (3) to produce a harvested DC voltage (Vhrv) and current (Ihrv) which charge a capacitance (C0). An enable circuit (17) causes a DC-DC converter (4) to be enabled, thereby discharging the capacitance into the converter, when a comparator (A0,A1) of the rectifier which controls switches (S1-S4) thereof detects a direction reversal of the AC output current (IPZ(t)). Another comparator (13) causes the enable circuit (17) to disable the converter (4) when the DC voltage exceeds a threshold (VREF), thereby causing the capacitance be recharged.

    Abstract translation: 用于将收获的振动能量有效地传送到电池(6)的系统(1-2)包括产生AC输出电压(VP(t))和电流(IPZ(t))的压电式收集器(2)和有源整流器 3)以产生对电容(C0)充电的收获的DC电压(Vhrv)和电流(Ihrv)。 当控制开关(S1-S4)的整流器的比较器(A0,A1)检测到方向(S1-S4)时,使能电路(17)使DC-DC转换器(4)使能,从而将电容放电到转换器中 交流输出电流(IPZ(t))的反转。 当DC电压超过阈值(VREF)时,另一比较器(13)使得使能电路(17)禁用转换器(4),从而使电容被再充电。

    Compensation circuitry and method for amplifiers driving large capacitive loads
    14.
    发明授权
    Compensation circuitry and method for amplifiers driving large capacitive loads 有权
    用于驱动大容性负载的放大器的补偿电路和方法

    公开(公告)号:US08890610B2

    公开(公告)日:2014-11-18

    申请号:US13761357

    申请日:2013-02-07

    CPC classification number: H03F3/45071 H03F1/223 H03F3/45192 H03F2200/411

    Abstract: An operational amplifier (10) capable of driving a capacitive load (CLOAD) and/or a resistive load (RLOAD) includes a first gain stage (2) having an output coupled to a high impedance node (3) and a second gain stage (5) having an input coupled to the first high impedance node. A gain reduction resistor (RD) and an AC coupling capacitor (CD) are coupled in series between the high impedance node and a reference voltage. A Miller feedback capacitor (CM) is coupled between an output conductor (7) of the second gain stage and the high impedance node. The output of the second gain stage may be coupled to the high impedance node by a cascode transistor (MCASCODE).

    Abstract translation: 能够驱动电容性负载(CLOAD)和/或电阻负载(RLOAD)的运算放大器(10)包括:第一增益级(2),其具有耦合到高阻抗节点(3)和第二增益级( 5)具有耦合到第一高阻抗节点的输入。 增益减小电阻(RD)和AC耦合电容(CD)串联耦合在高阻抗节点和参考电压之间。 米勒反馈电容器(CM)耦合在第二增益级的输出导体(7)和高阻抗节点之间。 第二增益级的输出可以通过共源共栅晶体管(MCASCODE)耦合到高阻抗节点。

    Compensation Circuitry And Method For Amplifiers Driving Large Capacitive Loads
    15.
    发明申请
    Compensation Circuitry And Method For Amplifiers Driving Large Capacitive Loads 有权
    用于放大器的补偿电路和方法驱动大容量负载

    公开(公告)号:US20140218112A1

    公开(公告)日:2014-08-07

    申请号:US13761357

    申请日:2013-02-07

    CPC classification number: H03F3/45071 H03F1/223 H03F3/45192 H03F2200/411

    Abstract: An operational amplifier (10) capable of driving a capacitive load (CLOAD) and/or a resistive load (RLOAD) includes a first gain stage (2) having an output coupled to a high impedance node (3) and a second gain stage (5) having an input coupled to the first high impedance node. A gain reduction resistor (RD) and an AC coupling capacitor (CD) are coupled in series between the high impedance node and a reference voltage. A Miller feedback capacitor (CM) is coupled between an output conductor (7) of the second gain stage and the high impedance node. The output of the second gain stage may be coupled to the high impedance node by a cascode transistor (MCASCODE).

    Abstract translation: 能够驱动电容性负载(CLOAD)和/或电阻负载(RLOAD)的运算放大器(10)包括:第一增益级(2),其具有耦合到高阻抗节点(3)和第二增益级( 5)具有耦合到第一高阻抗节点的输入。 增益减小电阻(RD)和AC耦合电容(CD)串联耦合在高阻抗节点和参考电压之间。 米勒反馈电容器(CM)耦合在第二增益级的输出导体(7)和高阻抗节点之间。 第二增益级的输出可以通过共源共栅晶体管(MCASCODE)耦合到高阻抗节点。

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