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11.发明申请公开(公告)号：US20150091647A1
公开(公告)日：2015-04-02
申请号：US14040856
申请日：2013-09-30
Applicant: Texas Instruments Incorporated
Inventor： Vaibhav Kumar , Vadim Valerievich Ivanov
IPC: H03F3/45
CPC classification number: H03F3/45179 , H03F3/45 , H03F3/45183 , H03F3/45475 , H03F2203/45248 , H03F2203/45344 , H03F2203/45511 , H03F2203/45512
Abstract: In an amplifier, a first stage receives a differential input voltage, which is formed by first and second input voltages, and outputs a first differential current in response thereto on first and second lines having respective first and second line voltages. A second stage receives the first and second line voltages and outputs a second differential current in response thereto on third and fourth lines having respective third and fourth line voltages. A third stage receives the third and fourth line voltages and outputs an output voltage in response thereto. A slew boost circuit detects a slew condition, in which a threshold difference arises between the first and second input voltages, and outputs a slew current in response thereto for maintaining a slew rate of the output voltage during the slew condition. The first stage includes circuits for reducing a variable difference between the first and second line voltages.
Abstract translation: 在放大器中，第一级接收由第一和第二输入电压形成的差分输入电压，并且在具有相应的第一和第二线电压的第一和第二线上响应于此输出第一差分电流。 第二级接收第一和第二线电压，并在具有相应的第三和第四线电压的第三和第四线上响应于此输出第二差分电流。 第三级接收第三和第四线电压并输出响应于此的输出电压。 回转升压电路检测在第一和第二输入电压之间出现阈值差的转换条件，并且响应于此产生一个回转电流，以保持在转换条件期间输出电压的转换速率。 第一级包括用于减小第一和第二线电压之间的可变差的电路。
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公开(公告)号：US20150015222A1
公开(公告)日：2015-01-15
申请号：US13938085
申请日：2013-07-09
Inventor： Vadim Valerievich Ivanov , Sudipto Chakraborty , Jens Graul
IPC: G05F1/46
CPC classification number: G05F1/56
Abstract: Voltage regulators are disclosed herein. An embodiment of a voltage regulator includes a MOS-type pass transistor, wherein a first node of the pass transistor is connectable to a voltage source and wherein a second node of the pass transistor is connected to the output of the voltage regulator. The voltage regulator also includes an error amplifier having a reference input and an output, the output being connected to the gate of the pass transistor, and the reference input being connected to a reference voltage source.
Abstract translation: 本文公开了电压调节器。 电压调节器的实施例包括MOS型通过晶体管，其中传输晶体管的第一节点可连接到电压源，并且其中传输晶体管的第二节点连接到电压调节器的输出端。 电压调节器还包括具有参考输入和输出的误差放大器，输出端连接到传输晶体管的栅极，参考输入端连接到参考电压源。
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公开(公告)号：US12068730B2
公开(公告)日：2024-08-20
申请号：US17307327
申请日：2021-05-04
Applicant: Texas Instruments Incorporated
Inventor： Vadim Valerievich Ivanov , Munaf Hussain Shaik , Srinivas Kumar Pulijala , Patrick Forster , Jerry Lee Doorenbos
CPC classification number: H03F3/45475 , H03M1/38 , H03M1/66 , H03F3/211 , H03F2200/129
Abstract: Disclosed is a system comprising a plurality of operational amplifiers, each operational amplifier having individually adjustable operational parameters, and a trimming circuit. The trimming circuit includes successive approximation register (SAR) logic that determines associated memory values. The trimming circuit changes the adjustable operational parameters of each operation amplifier based on the associated memory values.
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公开(公告)号：US11742811B2
公开(公告)日：2023-08-29
申请号：US17094847
申请日：2020-11-11
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Vadim Valerievich Ivanov , Srinivas K. Pulijala
IPC: H03F3/45
CPC classification number: H03F3/45179 , H03F2200/375 , H03F2203/45042 , H03F2203/45044 , H03F2203/45212
Abstract: An integrated circuit (IC) includes first, second, third, and fourth transistors, first and second current source devices, and a trim circuit. The first transistor has a first control input and a first current terminal. The second transistor has a second control input and a second current terminal. The third transistor had a third control input and third and fourth current terminals. The fourth transistor has a fourth control input and fifth and sixth current terminals. The first current source is coupled between a first power supply node and the third current terminal. The second current source is coupled between the first supply node and the fifth current terminal. The trim circuit is coupled between the fourth current terminal and a second power supply node, and is coupled between the sixth current terminal and the second power supply node. The trim circuit includes a resistive digital-to-analog converter (RDAC) circuit.
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公开(公告)号：US20230034632A1
公开(公告)日：2023-02-02
申请号：US17386979
申请日：2021-07-28
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Vadim Valerievich Ivanov , Srinivas Kumar Pulijala
Abstract: Differential input circuits employ protection transistors and feedback paths to limit the differential voltage applied to input transistors. In an example arrangement, a differential input voltage is applied to terminals of the protection transistors, and current paths couple the respective protection transistors to control terminals of the input transistors, respectively. A control terminal drive voltage source is coupled to the control terminals of the input protection transistors to control the drive voltage applied to those terminals. Feedback paths, one for each of the input transistors, control voltages applied to the control terminals of the input transistors, maintaining the input differential voltage at a relatively low level and defined by the product of a specified current value and a specified resistance value.
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Patent Agency Ranking
公开(公告)号：US11251759B2
公开(公告)日：2022-02-15
申请号：US16777521
申请日：2020-01-30
Applicant: Texas Instruments Incorporated
Inventor： Vadim Valerievich Ivanov , Srinivas Kumar Pulijala
IPC: H03F3/45
Abstract: An apparatus has four transistors. The first and third transistors each have a gate coupled to a first input terminal and second input terminal respectively, a source coupled to a current source and to a first terminal of a bias voltage source, and a substrate coupled to a second terminal of the bias voltage source. The second and fourth transistors each have a gate coupled to the first input terminal and the second input terminal respectively, a source coupled to the drain of the first and third transistors respectively, a drain coupled to a lower voltage supply and a substrate coupled to its source. The bias voltage source increases the threshold voltages of the first and third transistors above the second and fourth transistors, respectively. This ensures that the first and third transistors turn on after the second and fourth transistors, respectively.
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公开(公告)号：US10672493B2
公开(公告)日：2020-06-02
申请号：US16248283
申请日：2019-01-15
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Vadim Valerievich Ivanov
IPC: G11C27/02
Abstract: A sample and hold circuit with long hold time. A sample and hold circuit includes an amplifier, a capacitor, a switch, and a sampling network. The capacitor includes a first terminal coupled to an inverting input of the amplifier. The switch includes a first terminal that is coupled to an output of the amplifier, and a second terminal that is coupled to the inverting input of the amplifier. The sampling network is coupled to a non-inverting input of the amplifier.
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公开(公告)号：US10073478B1
公开(公告)日：2018-09-11
申请号：US15727779
申请日：2017-10-09
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Vadim Valerievich Ivanov , Srinivas K. Pulijala , Siva Kumar Sudani
Abstract: A voltage regulator includes a first transistor including a first terminal to receive an input voltage and a second transistor including a first terminal coupled to a second terminal of the first transistor. A charge pump couples to the second transistor and to an output voltage node. An amplifier receives a feedback voltage derived from the output voltage and generates a control signal to gates of the transistors. Responsive to the input voltage being more than a threshold larger than the output voltage, the amplifier maintains the second transistor off and the first transistor on such that current flows through the first transistor to the output voltage node but not the second transistor. Responsive to the input voltage being less than the threshold amount, the amplifier operates the first transistor in a triode mode and turns on the second transistor to provide current to the charge pump.
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公开(公告)号：US10033331B1
公开(公告)日：2018-07-24
申请号：US15394399
申请日：2016-12-29
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Vadim Valerievich Ivanov , Jerry L. Doorenbos
Abstract: An integrated circuit (IC) chip can include an operational amplifier with adjustable operational parameters. The IC chip can also include a trimming module configured to measure an output voltage of the operational amplifier in response to at least one of detecting that the operational amplifier has a positive supply voltage set to a level greater than a predetermined level and detecting a given common mode voltage at inverting and non-inverting inputs of the operational amplifier. The trimming module can also be configured to adjust the operational parameters of the operational amplifier based on the output voltage to trim the operational amplifier.
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公开(公告)号：US20180196454A1
公开(公告)日：2018-07-12
申请号：US15400976
申请日：2017-01-07
Applicant: Texas Instruments Incorporated
Inventor： Vadim Valerievich Ivanov , Sahana Sriraj
IPC: G05F1/575
CPC classification number: G05F1/575
Abstract: Low dropout regulators (LDOs) are disclosed herein. An example of an LDO includes an error amplifier having a first input and a second input, wherein the first input is for coupling to an output of the LDO and the second input for coupling to a reference voltage. The error amplifier has an output with a voltage that is proportional to the difference between the output voltage and the reference voltage. A second amplifier is coupled between the error amplifier and the output of the LDO. A gain boost amplifier is coupled between the error amplifier and the second amplifier. The gain boost amplifier increases DC gain of the LDO in response to a load step on the output.
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