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公开(公告)号：US11677370B2
公开(公告)日：2023-06-13
申请号：US17487241
申请日：2021-09-28
Applicant: TEXAS INSTRUMENTS INCORPORATED
CPC classification number: H03F3/45192 , H04L12/40 , H03F2200/78 , H03F2203/30061 , H03F2203/45508 , H04L2012/40215
Abstract: A circuit (e.g., implemented as part of a controller area network (CAN) bus receiver includes a pre-amplifier stage having first and second outputs. The circuit also includes a comparator having first and second inputs. The first input is coupled to the first output of the pre-amplifier stage, and the second input is coupled to the second output of the pre-amplifier stage. The comparator includes an input differential transistor pair, a second pair of transistors coupled to the input differential transistor pair in a cascode configuration, and a push-pull output stage coupled to the second pair of transistors.
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公开(公告)号：US11159135B2
公开(公告)日：2021-10-26
申请号：US16862089
申请日：2020-04-29
Applicant: TEXAS INSTRUMENTS INCORPORATED
Abstract: A circuit (e.g., implemented as part of a controller area network (CAN) bus receiver includes a pre-amplifier stage having first and second outputs. The circuit also includes a comparator having first and second inputs. The first input is coupled to the first output of the pre-amplifier stage, and the second input is coupled to the second output of the pre-amplifier stage. The comparator includes an input differential transistor pair, a second pair of transistors coupled to the input differential transistor pair in a cascode configuration, and a push-pull output stage coupled to the second pair of transistors.
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公开(公告)号：US20210159192A1
公开(公告)日：2021-05-27
申请号：US16697617
申请日：2019-11-27
Applicant: Texas Instruments Incorporated
IPC: H01L23/62 , H01L23/31 , H01L23/495
Abstract: A lead frame for a multi-chip module includes a first conductor structure disposed on a substrate and having first and second arms linked at an angle. The first conductor structure is connected to ground. The lead frame also includes a second conductor structure disposed on the substrate and connected to a voltage supply. The second conductor structure is spaced apart and electrically isolated from the first conductor structure. The first and the second conductor structures are arranged to flank a plurality of integrated circuits (ICs) including one or more surge protection ICs disposed on the substrate. The first conductor structure is electrically connected to the plurality of ICs to provide electrical connections to ground, and the second conductor structure is electrically connected to the plurality of ICs to provide electrical connections to the voltage supply.
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公开(公告)号：US10014774B2
公开(公告)日：2018-07-03
申请号：US15296839
申请日：2016-10-18
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Gangqiang Zhang , Vaibhav Garg , Xiaochun Zhao , Angelo W. D. Pereira , Vijayalakshmi Devarajan
CPC classification number: H02M3/158 , H02M1/08 , H02M2001/0009 , H02M2001/0032 , H02M2003/1566 , Y02B70/16
Abstract: One example includes a switching power supply. The switching power supply includes a power stage, a feedback loop, and a simulated feedback error generator. The power stage provides an output signal in response to a switching signal. The feedback loop monitors the output signal and provides a feedback error signal to adjust the switching signal to regulate the output signal. The simulated feedback error generator temporarily provides a simulated feedback error signal during a transition period from the low power mode to a high power mode of the switching power supply until the feedback loop has enough time to provide the feedback error signal.
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公开(公告)号：US09748842B1
公开(公告)日：2017-08-29
申请号：US15213217
申请日：2016-07-18
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Vijayalakshmi Devarajan , Gangqiang Zhang , Vaibhav Garg
CPC classification number: H02M1/08 , H02M3/1588 , H02M2001/0009 , H03K17/08122 , H03K2217/0027 , Y02B70/1466
Abstract: A system including a first power transistor including a gate, a second power transistor including a gate and connected in series with the first power transistor, wherein the connection between the transistors defines a switch node is disclosed. The system further includes a pulse width modulator (PWM) controller configured to assert control signals to the gates of the first and second power transistors, a high side sensing circuit coupled to the gate and a drain of the first power transistor. The system further includes a low side sensing circuit coupled to the gate and a drain of the second power transistor, and a track and hold circuit coupled to the high and low side sensing circuits and configured to couple sense signals from the high and low side sensing circuits.
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Patent Agency Ranking
公开(公告)号：US20160349774A1
公开(公告)日：2016-12-01
申请号：US14930906
申请日：2015-11-03
Applicant: TEXAS INSTRUMENTS INCORPORATED
IPC: G05F1/56
Abstract: Dynamic biasing circuits for low drop out (LDO) regulators are described. In some embodiments, an electronic circuit may include a low drop out (LDO) regulator; and a biasing circuit coupled to the LDO regulator, the biasing circuit configured to: monitor a first electrical current and a second electrical current; select a greater of the first or second electrical currents; and provide the selected electrical current to the LDO regulator. In other embodiments, a method may include: providing a digital core and a low drop out (LDO) regulator coupled to the digital core, wherein the digital core is configured to operate in an active mode and in a standby mode; monitoring, via a current selector circuit coupled to the LDO regulator, a first current and a second current; selecting a greater of the first or second electrical currents; and providing the selected current as a biasing current to the LDO regulator.
Abstract translation: 描述了用于低压降（LDO）调节器的动态偏置电路。 在一些实施例中，电子电路可以包括低压降（LDO）调节器; 以及耦合到所述LDO调节器的偏置电路，所述偏置电路被配置为：监视第一电流和第二电流; 选择较大的第一或第二电流; 并将所选择的电流提供给LDO调节器。 在其他实施例中，方法可以包括：提供耦合到数字核心的数字核心和低压降（LDO）调节器，其中所述数字核心被配置为以活动模式和待机模式操作; 通过耦合到LDO调节器的电流选择器电路监测第一电流和第二电流; 选择较大的第一或第二电流; 并将所选择的电流作为偏置电流提供给LDO调节器。
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公开(公告)号：US12051978B2
公开(公告)日：2024-07-30
申请号：US17813366
申请日：2022-07-19
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Dushmantha Bandara Rajapaksha , Roland Sperlich , Anant Shankar Kamath , Vijayalakshmi Devarajan , Wesley Ray
CPC classification number: H02M3/33523 , H01F27/288 , H02M1/4258 , H02M3/155 , H02M3/33569 , H02M3/33573 , H04L13/02 , H02M3/01
Abstract: A semiconductor package includes a transformer having a primary winding and a secondary winding. The primary winding has first and second terminals and a pair of taps. The secondary winding has first and second terminals and a pair of taps. The semiconductor package includes first and second data transfer circuits, a bridge, and a rectifier. The first data transfer circuit is coupled to the pair of taps of the primary winding. The second data transfer circuit is coupled to the pair of taps of the secondary winding. The bridge is coupled to the first and second terminals of the primary winding. The rectifier is coupled to the first and second terminals of the secondary winding.
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公开(公告)号：US11380631B2
公开(公告)日：2022-07-05
申请号：US16697617
申请日：2019-11-27
Applicant: Texas Instruments Incorporated
IPC: H01L23/62 , H01L23/31 , H01L23/495
Abstract: A lead frame for a multi-chip module includes a first conductor structure disposed on a substrate and having first and second arms linked at an angle. The first conductor structure is connected to ground. The lead frame also includes a second conductor structure disposed on the substrate and connected to a voltage supply. The second conductor structure is spaced apart and electrically isolated from the first conductor structure. The first and the second conductor structures are arranged to flank a plurality of integrated circuits (ICs) including one or more surge protection ICs disposed on the substrate. The first conductor structure is electrically connected to the plurality of ICs to provide electrical connections to ground, and the second conductor structure is electrically connected to the plurality of ICs to provide electrical connections to the voltage supply.
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公开(公告)号：US11176067B2
公开(公告)日：2021-11-16
申请号：US16909396
申请日：2020-06-23
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Richard Edwin Hubbard , Richard Sterling Broughton , Vijayalakshmi Devarajan , Mark Edward Wentroble
Abstract: An integrated circuit includes a combined serial data output and interrupt output terminal, a serial communication control circuit; an interrupt generation circuit, and an output circuit. The output circuit includes a serial data input, an interrupt input, and a combined serial data and interrupt output. The serial data input is coupled to a serial data output of the serial communication circuit. The interrupt input is coupled to an interrupt output of the interrupt generation circuit. The combined serial data and interrupt output is coupled to the combined serial data output and interrupt output terminal.
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公开(公告)号：US11175685B2
公开(公告)日：2021-11-16
申请号：US16914938
申请日：2020-06-29
Applicant: TEXAS INSTRUMENTS INCORPORATED
IPC: G05F1/46 , H03K17/00 , H03K5/24 , H03K3/3565
Abstract: An integrated circuit includes an input terminal, an input buffer circuit, an interface voltage control circuit, an output voltage selection circuit, an output driver circuit, and an output terminal. The input buffer circuit is coupled to the input terminal. The interface voltage control circuit is coupled to the input terminal. The output voltage selection circuit is coupled to the interface voltage control circuit. The output driver circuit is coupled to the output voltage selection circuit. The output terminal is coupled to the output driver circuit.
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