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公开(公告)号：US20200225345A1
公开(公告)日：2020-07-16
申请号：US16426779
申请日：2019-05-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： LEI DING , Srinath Mathur Ramaswamy , Anand Gopalan , Vaibhav Garg , Anand Ganesh Dabak
Abstract: Ultrasonic ranging systems and methods that use coding to distinguish emitted bursts from multiple transducers temporally stagger the bursts emitted from the transducers. The stagger delay between bursts from different transducers in a sensing frame can be randomized between different sensing frames to prevent blind zones. The stagger delay can be relatively small (e.g., between 3 ms and 10 ms) as compared to delays required between bursts in a single-tone ranging system (which would need to be more on the order of between 30 ms and 40 ms, depending on the maximum detecting range of the ranging system). The coding of bursts can be selected to utilize the entire bandwidth of the bursting transducer so as to preserve short-range sensitivity over transducer ringing. Schemes in which some transducers in a system only listen for bursts from other transducers but do not themselves burst within a sensing frame are also described.
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公开(公告)号：US20170047936A1
公开(公告)日：2017-02-16
申请号：US15333659
申请日：2016-10-25
Applicant: Texas Instruments Incorporated
Inventor： Timothy Paul Duryea , Vaibhav Garg
CPC classification number: H03M1/0607 , H03K19/0005 , H03M1/1076 , H03M1/122 , H03M1/1245 , H03M1/44
Abstract: The present disclosure describes a channel selector for use in an analog-to-digital converter that has a sampling circuit for converting an analog input to a digital output within a fault tolerance range. The channel selector includes a reception channel, a diagnostic channel, and an impedance compensator. The reception channel receives an analog signal for delivery to the sampling circuit when it is selected for coupling with the sampling circuit. The diagnostic channel receives a diagnostic signal for verifying the digital output of the sampling circuit when it is selected for coupling with the sampling circuit. The impedance compensator is configured to offset a high channel impedance of the reception channel based on the fault tolerance range of the sampling circuit and when the diagnostic channel is selected.
Abstract translation: 本公开描述了一种在模数转换器中使用的通道选择器，其具有用于将模拟输入转换为容错范围内的数字输出的采样电路。 信道选择器包括接收信道，诊断信道和阻抗补偿器。 当接收通道被选择用于与采样电路耦合时，接收通道接收用于传送到采样电路的模拟信号。 当诊断通道被选择用于与采样电路耦合时，诊断通道接收用于验证采样电路的数字输出的诊断信号。 阻抗补偿器被配置为基于采样电路的容错范围和选择诊断通道来抵消接收通道的高通道阻抗。
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公开(公告)号：US09509325B1
公开(公告)日：2016-11-29
申请号：US14706762
申请日：2015-05-07
Applicant: Texas Instruments Incorporated
Inventor： Timothy Paul Duryea , Vaibhav Garg
CPC classification number: H03M1/0607 , H03K19/0005 , H03M1/1076 , H03M1/122 , H03M1/1245 , H03M1/44
Abstract: The present disclosure describes a channel selector for use in an analog-to-digital converter that has a sampling circuit for converting an analog input to a digital output within a fault tolerance range. The channel selector includes a reception channel, a diagnostic channel, and an impedance compensator. The reception channel receives an analog signal for delivery to the sampling circuit when it is selected for coupling with the sampling circuit. The diagnostic channel receives a diagnostic signal for verifying the digital output of the sampling circuit when it is selected for coupling with the sampling circuit. The impedance compensator is configured to offset a high channel impedance of the reception channel based on the fault tolerance range of the sampling circuit and when the diagnostic channel is selected.
Abstract translation: 本公开描述了一种在模数转换器中使用的通道选择器，其具有用于将模拟输入转换为容错范围内的数字输出的采样电路。 信道选择器包括接收信道，诊断信道和阻抗补偿器。 当接收通道被选择用于与采样电路耦合时，接收通道接收用于传送到采样电路的模拟信号。 当诊断通道被选择用于与采样电路耦合时，诊断通道接收用于验证采样电路的数字输出的诊断信号。 阻抗补偿器被配置为基于采样电路的容错范围和选择诊断通道来抵消接收通道的高通道阻抗。
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公开(公告)号：US20160329904A1
公开(公告)日：2016-11-10
申请号：US14706762
申请日：2015-05-07
Applicant: Texas Instruments Incorporated
Inventor： Timothy Paul Duryea , Vaibhav Garg
CPC classification number: H03M1/0607 , H03K19/0005 , H03M1/1076 , H03M1/122 , H03M1/1245 , H03M1/44
Abstract: The present disclosure describes a channel selector for use in an analog-to-digital converter that has a sampling circuit for converting an analog input to a digital output within a fault tolerance range. The channel selector includes a reception channel, a diagnostic channel, and an impedance compensator. The reception channel receives an analog signal for delivery to the sampling circuit when it is selected for coupling with the sampling circuit. The diagnostic channel receives a diagnostic signal for verifying the digital output of the sampling circuit when it is selected for coupling with the sampling circuit. The impedance compensator is configured to offset a high channel impedance of the reception channel based on the fault tolerance range of the sampling circuit and when the diagnostic channel is selected.
Abstract translation: 本公开描述了一种在模数转换器中使用的通道选择器，其具有用于将模拟输入转换为容错范围内的数字输出的采样电路。 信道选择器包括接收信道，诊断信道和阻抗补偿器。 当接收通道被选择用于与采样电路耦合时，接收通道接收用于传送到采样电路的模拟信号。 当诊断通道被选择用于与采样电路耦合时，诊断通道接收用于验证采样电路的数字输出的诊断信号。 阻抗补偿器被配置为基于采样电路的容错范围和选择诊断通道来抵消接收通道的高通道阻抗。
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公开(公告)号：US20240411017A1
公开(公告)日：2024-12-12
申请号：US18393905
申请日：2023-12-22
Applicant: Texas Instruments Incorporated
Inventor： LEI DING , Srinath Mathur Ramaswamy , Anand Gopalan , Vaibhav Garg , Anand Ganesh Dabak
IPC: G01S15/10 , G01S7/526 , G01S15/931
Abstract: In one example, a method comprises using a first transducer, emitting a first acoustic signal representing a first code. The method further comprises using the first transducer, receiving a second acoustic signal, and converting the second acoustic signal to a sensor signal. The method further comprises computing a time-of-flight for the second acoustic signal based on a time difference between when the first transducer emits the first acoustic signal and when the first transducer receives the second acoustic signal. The method further comprises responsive to the correlation result indicating that the third acoustic signal is a reflection of a third acoustic signal emitted by a second transducer: determining a delay time between when the first transducer emits the first acoustic signal and when the second transducer emits the third acoustic signal; adjusting the time-of-flight based on the delay time; and providing a distance measurement based on the adjusted time-of-flight.
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Patent Agency Ranking
公开(公告)号：US10014774B2
公开(公告)日：2018-07-03
申请号：US15296839
申请日：2016-10-18
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Gangqiang Zhang , Vaibhav Garg , Xiaochun Zhao , Angelo W. D. Pereira , Vijayalakshmi Devarajan
CPC classification number: H02M3/158 , H02M1/08 , H02M2001/0009 , H02M2001/0032 , H02M2003/1566 , Y02B70/16
Abstract: One example includes a switching power supply. The switching power supply includes a power stage, a feedback loop, and a simulated feedback error generator. The power stage provides an output signal in response to a switching signal. The feedback loop monitors the output signal and provides a feedback error signal to adjust the switching signal to regulate the output signal. The simulated feedback error generator temporarily provides a simulated feedback error signal during a transition period from the low power mode to a high power mode of the switching power supply until the feedback loop has enough time to provide the feedback error signal.
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公开(公告)号：US09748842B1
公开(公告)日：2017-08-29
申请号：US15213217
申请日：2016-07-18
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Vijayalakshmi Devarajan , Gangqiang Zhang , Vaibhav Garg
CPC classification number: H02M1/08 , H02M3/1588 , H02M2001/0009 , H03K17/08122 , H03K2217/0027 , Y02B70/1466
Abstract: A system including a first power transistor including a gate, a second power transistor including a gate and connected in series with the first power transistor, wherein the connection between the transistors defines a switch node is disclosed. The system further includes a pulse width modulator (PWM) controller configured to assert control signals to the gates of the first and second power transistors, a high side sensing circuit coupled to the gate and a drain of the first power transistor. The system further includes a low side sensing circuit coupled to the gate and a drain of the second power transistor, and a track and hold circuit coupled to the high and low side sensing circuits and configured to couple sense signals from the high and low side sensing circuits.
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公开(公告)号：US11733377B2
公开(公告)日：2023-08-22
申请号：US16364652
申请日：2019-03-26
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Lei Ding , Srinath Mathur Ramaswamy , Anand Gopalan , Vaibhav Garg , Anand Ganesh Dabak , Baher S. Haroun
IPC: G01S15/10 , G01S15/931 , G01S15/32 , G01S15/58
CPC classification number: G01S15/104 , G01S15/325 , G01S15/582 , G01S15/931 , G01S2015/938
Abstract: In an ultrasonic detection system that uses frequency-modulation or phase-modulation coding to distinguish emitted bursts from multiple transducers, a receiver associated with a transducer uses peak search, peak buffer, and peak rank stages in one or more receiver signal processing paths to identify valid received ultrasonic signal envelope peaks in correlator outputs. The peak rank stage can support different modes respectively designed to handle one code, two or more codes, or two or more codes with support for Doppler frequency shift detection. Valid peak information (e.g., amplitude and time) can be reported to a central controller and/or stored locally in a fusion stage to generate more intelligent information for targets or obstacles using peaks from multiple bursts.
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公开(公告)号：US11644555B2
公开(公告)日：2023-05-09
申请号：US16364691
申请日：2019-03-26
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Lei Ding , Srinath Mathur Ramaswamy , Vaibhav Garg , Anand Gopalan
CPC classification number: G01S7/536 , G01S15/325
Abstract: In an ultrasonic detection system that uses frequency-modulation coding to distinguish emitted bursts from multiple transducers, a receiver associated with a transducer uses dynamic thresholding to discriminate valid echoes from system and environmental noise in multiple envelope signals produced by multiple correlators. The time-varying dynamic thresholds are generated from the mean of noise in a respective envelope derived from the output of a respective correlator. Multiple thresholds can be combined together such that a single time-varying threshold is applied to all correlators' envelopes. Such thresholding has the benefits of a constant false-alarm rate with regard to detection of echoes (as opposed to false triggering from noise), and, owing to finer-resolution and adaptive thresholds, can detect targets or obstacles as further distances and with greater time responsiveness.
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公开(公告)号：US09960777B2
公开(公告)日：2018-05-01
申请号：US15333659
申请日：2016-10-25
Applicant: Texas Instruments Incorporated
Inventor： Timothy Paul Duryea , Vaibhav Garg
CPC classification number: H03M1/0607 , H03K19/0005 , H03M1/1076 , H03M1/122 , H03M1/1245 , H03M1/44
Abstract: The present disclosure describes a channel selector for use in an analog-to-digital converter that has a sampling circuit for converting an analog input to a digital output within a fault tolerance range. The channel selector includes a reception channel, a diagnostic channel, and an impedance compensator. The reception channel receives an analog signal for delivery to the sampling circuit when it is selected for coupling with the sampling circuit. The diagnostic channel receives a diagnostic signal for verifying the digital output of the sampling circuit when it is selected for coupling with the sampling circuit. The impedance compensator is configured to offset a high channel impedance of the reception channel based on the fault tolerance range of the sampling circuit and when the diagnostic channel is selected.
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