-
公开(公告)号：US10131536B2
公开(公告)日：2018-11-20
申请号：US15176365
申请日：2016-06-08
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Shyh-Wei Cheng , Chih-Yu Wang , Hsi-Cheng Hsu , Hsin-Yu Chen , Ji-Hong Chiang , Jui-Chun Weng , Wei-Ding Wu
Abstract: The present disclosure relates to a MEMs package having a heating element configured to adjust a pressure within a hermetically sealed chamber by inducing out-gassing of into the chamber, and an associated method. In some embodiments, the MEMs package has a CMOS substrate having one or more semiconductor devices arranged within a semiconductor body. A MEMs structure is connected to the CMOS substrate and has a micro-electromechanical (MEMs) device. The CMOS substrate and the MEMs structure form a hermetically sealed chamber abutting the MEMs device. A heating element is electrically coupled to the one or more semiconductor devices and is separated from the hermetically sealed chamber by an out-gassing layer arranged along an interior surface of the hermetically sealed chamber. By operating the heating element to cause the out-gassing layer to release a gas, the pressure of the hermetically sealed chamber can be adjusted after it is formed.
-
公开(公告)号：US11726342B2
公开(公告)日：2023-08-15
申请号：US17881439
申请日：2022-08-04
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Hsin-Yu Chen , Chun-Peng Li , Chia-Chun Hung , Ching-Hsiang Hu , Wei-Ding Wu , Jui-Chun Weng , Ji-Hong Chiang , Yen Chiang Liu , Jiun-Jie Chiou , Li-Yang Tu , Jia-Syuan Li , You-Cheng Jhang , Shin-Hua Chen , Lavanya Sanagavarapu , Han-Zong Pan , Hsi-Cheng Hsu
IPC: G02B27/30 , H01L31/0232 , H01L27/146
CPC classification number: G02B27/30 , H01L27/14625 , H01L31/02325
Abstract: Disclosed is a method to fabricate a multifunctional collimator structure In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; and a plurality of via holes, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction, wherein the substrate has a bulk impurity doping concentration equal to or greater than 1×1019 per cubic centimeter (cm−3) and a first thickness, and wherein the bulk impurity doping concentration and the first thickness of the substrate are configured so as to allow the optical collimator to filter light in a range of wavelengths.
-
公开(公告)号：US10513432B2
公开(公告)日：2019-12-24
申请号：US15904085
申请日：2018-02-23
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Jui-Chun Weng , Lavanya Sanagavarapu , Ching-Hsiang Hu , Wei-Ding Wu , Shyh-Wei Cheng , Ji-Hong Chiang , Hsin-Yu Chen , Hsi-Cheng Hsu
Abstract: A method for treating a micro electro-mechanical system (MEMS) component is disclosed. In one example, the method includes the steps of providing a first wafer, treating the first wafer to form cavities and at least an oxide layer on a top surface of the first wafer using a first chemical vapor deposition (CVD) process, providing a second wafer, bonding the second wafer on a top surface of the at least one oxide layer, treating the second wafer to form a first plurality of structures, depositing a layer of Self-Assembling Monolayer (SAM) to a surface of the MEMS component using a second CVD process.
-
公开(公告)号：US20180370790A1
公开(公告)日：2018-12-27
申请号：US16122180
申请日：2018-09-05
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Shyh-Wei Cheng , Chih-Yu Wang , Hsi-Cheng Hsu , Ji-Hong Chiang , Jui-Chun Weng , Shiuan-Jeng Lin , Wei-Ding Wu , Ching-Hsiang Hu
Abstract: The present disclosure, in some embodiments, relates to a method of forming a micro-electromechanical system (MEMS) package. The method includes forming one or more depressions within a capping substrate. A back-side of a MEMS substrate is bonded to the capping substrate after forming the one or more depressions, so that the one or more depressions define one or more cavities between the capping substrate and the MEMS substrate. A front-side of the MEMS substrate is selectively etched to form one or more trenches extending through the MEMS substrate, and one or more polysilicon vias are formed within the one or more trenches. A conductive bonding structure is formed on the front-side of the MEMS substrate at a location contacting the one or more polysilicon vias. The MEMS substrate is bonded to a CMOS substrate having one or more semiconductor devices by way of the conductive bonding structure.
-
公开(公告)号：US10155656B2
公开(公告)日：2018-12-18
申请号：US14980297
申请日：2015-12-28
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Shyh-Wei Cheng , Chih-Yu Wang , Hsi-Cheng Hsu , Ji-Hong Chiang , Jui-Chun Weng , Shiuan-Jeng Lin , Wei-Ding Wu , Ching-Hsiang Hu
Abstract: The present disclosure relates to micro-electromechanical system (MEMS) package that uses polysilicon inter-tier connections to provide for a low parasitic capacitance in MEM device signals, and a method of formation. In some embodiments, the MEMS package has a CMOS substrate with one or more semiconductor devices arranged within a semiconductor body. A MEMS substrate having an ambulatory element is connected to the CMOS substrate by a conductive bonding structure. The conductive bonding structure is arranged on a front-side of the MEMS substrate at a location laterally offset from the ambulatory element. One or more polysilicon vias extend through the conductive MEMS substrate to the bonding structure. The one or more polysilicon vias are configured to electrically couple the MEMS substrate to the CMOS substrate. By connecting the MEMS substrate to the CMOS substrate using the polysilicon vias, the parasitic capacitance and form factor of the MEMS package are reduced.
-
Patent Agency Ranking
公开(公告)号：US20170107100A1
公开(公告)日：2017-04-20
申请号：US15176365
申请日：2016-06-08
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Shyh-Wei Cheng , Chih-Yu Wang , Hsi-Cheng Hsu , Hsin-Yu Chen , Ji-Hong Chiang , Jui-Chun Weng , Wei-Ding Wu
CPC classification number: B81B7/0041 , B81B3/0081 , B81B2201/0235 , B81B2201/0242 , B81B2207/012 , B81B2207/07 , B81B2207/09 , B81C1/00293 , B81C2201/013 , B81C2203/0109 , B81C2203/0118 , B81C2203/037 , B81C2203/038 , B81C2203/0735 , H01L28/20
Abstract: The present disclosure relates to a MEMs package having a heating element configured to adjust a pressure within a hermetically sealed chamber by inducing out-gassing of into the chamber, and an associated method. In some embodiments, the MEMs package has a CMOS substrate having one or more semiconductor devices arranged within a semiconductor body. A MEMs structure is connected to the CMOS substrate and has a micro-electromechanical (MEMs) device. The CMOS substrate and the MEMs structure form a hermetically sealed chamber abutting the MEMs device. A heating element is electrically coupled to the one or more semiconductor devices and is separated from the hermetically sealed chamber by an out-gassing layer arranged along an interior surface of the hermetically sealed chamber. By operating the heating element to cause the out-gassing layer to release a gas, the pressure of the hermetically sealed chamber can be adjusted after it is formed.
-
公开(公告)号：US12157667B2
公开(公告)日：2024-12-03
申请号：US17719986
申请日：2022-04-13
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Jui-Chun Weng , Lavanya Sanagavarapu , Ching-Hsiang Hu , Wei-Ding Wu , Shyh-Wei Cheng , Ji-Hong Chiang , Hsin-Yu Chen , Hsi-Cheng Hsu
Abstract: A method for treating a micro electro-mechanical system (MEMS) component is disclosed. In one example, the method includes the steps of providing a first wafer, treating the first wafer to form cavities and at least an oxide layer on a top surface of the first wafer using a first chemical vapor deposition (CVD) process, providing a second wafer, bonding the second wafer on a top surface of the at least one oxide layer, treating the second wafer to form a first plurality of structures, depositing a layer of Self-Assembling Monolayer (SAM) to a surface of the MEMS component using a second CVD process.
-
公开(公告)号：US11454820B2
公开(公告)日：2022-09-27
申请号：US16656290
申请日：2019-10-17
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Hsin-Yu Chen , Yen-Chiang Liu , Jiun-Jie Chiou , Jia-Syuan Li , You-Cheng Jhang , Shin-Hua Chen , Lavanya Sanagavarapu , Han-Zong Pan , Chun-Peng Li , Chia-Chun Hung , Ching-Hsiang Hu , Wei-Ding Wu , Jui-Chun Weng , Ji-Hong Chiang , Hsi-Cheng Hsu
IPC: G02B27/30 , G02B5/20 , G02B26/00 , H01L27/146 , H01L31/0216 , G06V40/13
Abstract: Disclosed is a cost-effective method to fabricate a multifunctional collimator structure for contact image sensors to filter ambient infrared light to reduce noises. In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; a plurality of via holes; and a conductive layer, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction.
-
公开(公告)号：US11407636B2
公开(公告)日：2022-08-09
申请号：US16122180
申请日：2018-09-05
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Shyh-Wei Cheng , Chih-Yu Wang , Hsi-Cheng Hsu , Ji-Hong Chiang , Jui-Chun Weng , Shiuan-Jeng Lin , Wei-Ding Wu , Ching-Hsiang Hu
Abstract: The present disclosure, in some embodiments, relates to a method of forming a micro-electromechanical system (MEMS) package. The method includes forming one or more depressions within a capping substrate. A back-side of a MEMS substrate is bonded to the capping substrate after forming the one or more depressions, so that the one or more depressions define one or more cavities between the capping substrate and the MEMS substrate. A front-side of the MEMS substrate is selectively etched to form one or more trenches extending through the MEMS substrate, and one or more polysilicon vias are formed within the one or more trenches. A conductive bonding structure is formed on the front-side of the MEMS substrate at a location contacting the one or more polysilicon vias. The MEMS substrate is bonded to a CMOS substrate having one or more semiconductor devices by way of the conductive bonding structure.
-
公开(公告)号：US11305980B2
公开(公告)日：2022-04-19
申请号：US16717862
申请日：2019-12-17
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Jui-Chun Weng , Lavanya Sanagavarapu , Ching-Hsiang Hu , Wei-Ding Wu , Shyh-Wei Cheng , Ji-Hong Chiang , Hsin-Yu Chen , Hsi-Cheng Hsu
Abstract: A method for treating a micro electro-mechanical system (MEMS) component is disclosed. In one example, the method includes the steps of providing a first wafer, treating the first wafer to form cavities and at least an oxide layer on a top surface of the first wafer using a first chemical vapor deposition (CVD) process, providing a second wafer, bonding the second wafer on a top surface of the at least one oxide layer, treating the second wafer to form a first plurality of structures, depositing a layer of Self-Assembling Monolayer (SAM) to a surface of the MEMS component using a second CVD process.
-
-
-
-
-
-
-
-
-
Search Results
22
records
(took 0.022 seconds)
