公开(公告)号：US11088137B2

公开(公告)日：2021-08-10

申请号：US16724404

申请日：2019-12-23

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Hao Lin ,  Hsin-Yu Chen ,  Shou-Wei Hsieh

IPC: H01L29/66 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/308 ,  H01L21/311 ,  H01L27/02 ,  H01L21/762 ,  H01L29/06 ,  H01L21/84

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a patterned mask on the second region; and performing a process to enlarge the first fin-shaped structure so that the top surfaces of the first fin-shaped structure and the second fin-shaped structure are different.

公开(公告)号：US10943993B2

公开(公告)日：2021-03-09

申请号：US16396777

申请日：2019-04-29

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Hao Lin ,  Hsin-Yu Chen ,  Shou-Wei Hsieh

IPC: H01L29/66 ,  H01L21/762

Abstract: A method for fabricating semiconductor device includes: forming a fin-shaped structure on a substrate, wherein the fin-shaped structure is extending along a first direction; forming a gate layer on the fin-shaped structure; removing part of the gate layer and part of the fin-shaped structure to form a first trench for dividing the fin-shaped structure into a first portion and a second portion, wherein the first trench is extending along a second direction; forming a patterned mask on the gate layer and into the first trench; removing part of the gate layer and part of the fin-shaped structure to form a second trench, wherein the second trench is extending along the first direction; and filling a dielectric layer in the first trench and the second trench.

公开(公告)号：US10692780B2

公开(公告)日：2020-06-23

申请号：US16280043

申请日：2019-02-20

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Hao Lin ,  Hsin-Yu Chen ,  Shou-Wei Hsieh

IPC: H01L21/8238 ,  H01L29/161 ,  H01L27/092 ,  H01L29/66

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first gate structure on the first region and a second gate structure on the second region; forming a first spacer around the first gate structure; forming a first epitaxial layer adjacent to two sides of the first spacer; forming a buffer layer on the first gate structure; and forming a contact etch stop layer (CESL) on the buffer layer on the first region and the second gate structure on the second region.

公开(公告)号：US10153210B1

公开(公告)日：2018-12-11

申请号：US15618131

申请日：2017-06-09

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Hao Lin ,  Hsin-Yu Chen ,  Chun-Tsen Lu ,  Shou-Wei Hsieh

IPC: H01L29/06 ,  H01L21/8234 ,  H01L21/02

CPC classification number: H01L21/823462 ,  H01L21/02164 ,  H01L21/02233 ,  H01L21/02269 ,  H01L21/0228 ,  H01L21/823431

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region; forming a shallow trench isolation (STI) around the first fin-shaped structure; forming a first oxide layer on the first fin-shaped structure; and then forming a second oxide layer on the first oxide layer and the STI.

公开(公告)号：US09972623B1

公开(公告)日：2018-05-15

申请号：US15375177

申请日：2016-12-12

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Hao Lin ,  Shou-Wei Hsieh ,  Hsin-Yu Chen

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/51 ,  H01L21/311

CPC classification number: H01L27/092 ,  H01L21/31144 ,  H01L21/82345 ,  H01L21/823828 ,  H01L21/823842 ,  H01L21/823857 ,  H01L27/088 ,  H01L29/517

Abstract: A manufacturing method of a semiconductor device includes the following steps. A barrier layer is formed in a first region and a second region of a semiconductor substrate. The barrier layer formed in the first region is thinned before a step of forming a first work function layer on the barrier layer. The first work function layer formed on the first region is then removed. The process of thinning the barrier layer in the first region and the process of removing the first work function layer in the first region are performed separately for ensuring the coverage of the first work function layer in the second region. The electrical performance of the semiconductor device and the uniformity of the electrical performance of the semiconductor device may be improved accordingly.

公开(公告)号：US20250089349A1

公开(公告)日：2025-03-13

申请号：US18381639

申请日：2023-10-19

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Hao Lin

IPC: H01L27/06 ,  H01L21/265 ,  H01L21/762 ,  H01L29/78

Abstract: A structure with a capacitor and a fin transistor includes a substrate. The substrate includes a capacitor region and a fin transistor region. A mesa is disposed within the capacitor region of the substrate. The mesa protrudes from a surface of the substrate. The mesa includes a top surface and two sloping surfaces. Each of the sloping surfaces connects to the top surface of the mesa and the surface of the substrate. A doping region is disposed within the mesa. A capacitor electrode is only disposed on the top surface. A capacitor dielectric layer is disposed between the capacitor electrode and the doping region.

公开(公告)号：US20240413225A1

公开(公告)日：2024-12-12

申请号：US18811736

申请日：2024-08-21

Applicant: UNITED MICROELECTRONICS CORP

Inventor： Chun-Hao Lin ,  Hsin-Yu Chen ,  Shou-Wei Hsieh

IPC: H01L29/66 ,  H01L21/762

Abstract: A semiconductor device includes a gate isolation structure on a shallow trench isolation (STI), a first epitaxial layer on one side of the gate isolation structure, a second epitaxial layer on another side of the gate isolation structure, first fin-shaped structures directly under the first epitaxial layer, and second fin-shaped structures directly under the second epitaxial layer, in which the STI surrounds the first fin-shaped structures and the second fin-shaped structures.

公开(公告)号：US11876095B2

公开(公告)日：2024-01-16

申请号：US17367447

申请日：2021-07-05

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Hao Lin ,  Hsin-Yu Chen ,  Shou-Wei Hsieh

IPC: H01L27/08 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/308 ,  H01L21/311 ,  H01L27/02 ,  H01L21/762 ,  H01L29/06 ,  H01L29/66 ,  H01L21/84

CPC classification number: H01L27/0886 ,  H01L21/308 ,  H01L21/31144 ,  H01L21/76224 ,  H01L21/823412 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823462 ,  H01L21/823481 ,  H01L27/0207 ,  H01L29/0649 ,  H01L29/0657 ,  H01L29/66545 ,  H01L29/66818 ,  H01L21/845

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a patterned mask on the second region; and performing a process to enlarge the first fin-shaped structure so that the top surfaces of the first fin-shaped structure and the second fin-shaped structure are different.

公开(公告)号：US11581422B2

公开(公告)日：2023-02-14

申请号：US17161707

申请日：2021-01-29

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Hao Lin ,  Hsin-Yu Chen ,  Shou-Wei Hsieh

IPC: H01L29/66 ,  H01L21/762

Abstract: A semiconductor device includes a gate isolation structure on a shallow trench isolation (STI), a first epitaxial layer on one side of the gate isolation structure, a second epitaxial layer on another side of the gate isolation structure, first fin-shaped structures directly under the first epitaxial layer, and second fin-shaped structures directly under the second epitaxial layer, in which the STI surrounds the first fin-shaped structures and the second fin-shaped structures.

公开(公告)号：US20210159322A1

公开(公告)日：2021-05-27

申请号：US17161696

申请日：2021-01-29

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Hao Lin ,  Hsin-Yu Chen ,  Shou-Wei Hsieh

IPC: H01L29/66 ,  H01L21/762

Abstract: A method for fabricating semiconductor device includes: forming a fin-shaped structure on a substrate, wherein the fin-shaped structure is extending along a first direction; forming a gate layer on the fin-shaped structure; removing part of the gate layer and part of the fin-shaped structure to form a first trench for dividing the fin-shaped structure into a first portion and a second portion, wherein the first trench is extending along a second direction; forming a patterned mask on the gate layer and into the first trench; removing part of the gate layer and part of the fin-shaped structure to form a second trench, wherein the second trench is extending along the first direction; and filling a dielectric layer in the first trench and the second trench.