公开(公告)号：US20230135742A1

公开(公告)日：2023-05-04

申请号：US18088631

申请日：2022-12-26

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ching-Ling Lin ,  Wen-An Liang ,  Chen-Ming Huang

IPC: H01L21/8234 ,  H01L29/06 ,  H01L27/088 ,  H01L21/764 ,  H01L29/66 ,  H01L29/78

Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a gate structure on the fin-shaped structure and an interlayer dielectric (ILD) layer around the gate structure, and a single diffusion break (SDB) structure in the ILD layer and the fin-shaped structure. Preferably, the SDB structure includes a bottom portion and a top portion on the bottom portion, in which the top portion and the bottom portion include different widths.

公开(公告)号：US20200258788A1

公开(公告)日：2020-08-13

申请号：US16859959

申请日：2020-04-27

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ching-Ling Lin ,  Wen-An Liang ,  Chen-Ming Huang

IPC: H01L21/8234 ,  H01L29/66 ,  H01L29/78 ,  H01L21/764 ,  H01L27/088 ,  H01L29/06

Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a gate structure on the fin-shaped structure and an interlayer dielectric (ILD) layer around the gate structure, and a single diffusion break (SDB) structure in the ILD layer and the fin-shaped structure. Preferably, the SDB structure includes a bottom portion and a top portion on the bottom portion, in which the top portion and the bottom portion include different widths.

公开(公告)号：US10475709B1

公开(公告)日：2019-11-12

申请号：US16030871

申请日：2018-07-10

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Fu-Jung Chuang ,  Ching-Ling Lin ,  Po-Jen Chuang ,  Yu-Ren Wang ,  Wen-An Liang ,  Chia-Ming Kuo ,  Guan-Wei Huang ,  Yuan-Yu Chung ,  I-Ming Tseng

IPC: H01L21/00 ,  H01L21/8238 ,  H01L27/092 ,  H01L21/762

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region; removing part of the first fin-shaped structure to forma first trench; forming a dielectric layer in the first trench, wherein the dielectric layer comprises silicon oxycarbonitride (SiOCN); and planarizing the dielectric layer to form a first single diffusion break (SDB) structure.

公开(公告)号：US10312146B2

公开(公告)日：2019-06-04

申请号：US15647031

申请日：2017-07-11

Applicant: United Microelectronics Corp.

Inventor： Ching-Ling Lin ,  Wen-An Liang ,  Chen-Ming Huang

IPC: H01L21/8234 ,  H01L21/033 ,  H01L21/8238 ,  H01L21/84 ,  H01L21/324 ,  H01L21/02 ,  H01L27/088 ,  H01L29/417

Abstract: A method for fabricating a semiconductor structure includes forming a plurality of mandrels over a substrate, wherein the substrate comprises a semiconductor substrate as a base. Then, a first dielectric layer is formed to cover on a predetermined mandrel of the mandrels. A second dielectric layer is formed over the substrate to cover the mandrels. The mandrels are removed, wherein a remaining portion of the first dielectric layer and the second dielectric layer at a sidewall of the mandrels remains on the substrate. An anisotropic etching process is performed over the substrate until a top portion of the semiconductor substrate is etched to form a plurality of fins corresponding to the remaining portion of the first dielectric layer and the second dielectric layer.

公开(公告)号：US09786502B2

公开(公告)日：2017-10-10

申请号：US15067157

申请日：2016-03-10

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kuan-Hsien Li ,  Rai-Min Huang ,  I-Ming Tseng ,  Wen-An Liang ,  Chen-Ming Huang

IPC: H01L21/033 ,  H01L21/8234

CPC classification number: H01L21/0337 ,  H01L21/823431 ,  H01L21/845 ,  H01L29/6681

Abstract: A method for forming fin structure includes following steps. A substrate is provided. A first mandrel and a plurality of second mandrels are formed on the substrate simultaneously. A plurality of spacers are respectively formed on sidewalls of the first mandrel and the second mandrels and followed by removing the first mandrel and the second mandrels to form a first spacer pattern and a plurality of second spacer patterns. Then the substrate is etched to simultaneously form at least a first fin and a plurality of second fins on the substrate with the first spacer pattern and the second spacer patterns serving as an etching mask. At least one of the second fins is immediately next to the first fin, and a fin width of the first fin is larger than a fin width of the second fins. Then, the second fins are removed from the substrate.

公开(公告)号：US20170263454A1

公开(公告)日：2017-09-14

申请号：US15067157

申请日：2016-03-10

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kuan-Hsien Li ,  Rai-Min Huang ,  I-Ming Tseng ,  Wen-An Liang ,  Chen-Ming Huang

IPC: H01L21/033 ,  H01L21/8234

CPC classification number: H01L21/0337 ,  H01L21/823431 ,  H01L21/845 ,  H01L29/6681

Abstract: A method for forming fin structure includes following steps. A substrate is provided. A first mandrel and a plurality of second mandrels are formed on the substrate simultaneously. A plurality of spacers are respectively formed on sidewalls of the first mandrel and the second mandrels and followed by removing the first mandrel and the second mandrels to form a first spacer pattern and a plurality of second spacer patterns. Then the substrate is etched to simultaneously form at least a first fin and a plurality of second fins on the substrate with the first spacer pattern and the second spacer patterns serving as an etching mask. At least one of the second fins is immediately next to the first fin, and a fin width of the first fin is larger than a fin width of the second fins. Then, the second fins are removed from the substrate.

公开(公告)号：US20170207129A1

公开(公告)日：2017-07-20

申请号：US15473614

申请日：2017-03-30

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： I-Ming Tseng ,  Wen-An Liang ,  Chen-Ming Huang

IPC: H01L21/8234 ,  H01L23/535 ,  H01L27/088 ,  H01L29/06 ,  H01L21/768 ,  H01L29/66

CPC classification number: H01L21/823475 ,  H01L21/76805 ,  H01L21/76895 ,  H01L21/823431 ,  H01L21/823481 ,  H01L23/485 ,  H01L23/535 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66515 ,  H01L29/66545 ,  H01L29/6681 ,  H01L29/7851

Abstract: The present invention further provides a method for forming a semiconductor device, comprising: first, a substrate having a fin structure disposed thereon is provided, wherein the fin structure has a trench, next, a first liner in the trench is formed, a first insulating layer is formed on the first liner, afterwards, a shallow trench isolation is formed in the substrate and surrounding the fin structure, wherein a bottom surface of the shallow trench isolation is higher than a bottom surface of the first insulating layer, and a top surface of the shallow trench isolation is lower than a top surface of the first insulating layer, and a dummy gate structure is formed on the first insulating layer and disposed above the trench, wherein a bottom surface of the dummy gate structure and a top surface of the fin structure are on a same level.

公开(公告)号：US20170154823A1

公开(公告)日：2017-06-01

申请号：US14981929

申请日：2015-12-29

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： I-Ming Tseng ,  Wen-An Liang ,  Chen-Ming Huang

IPC: H01L21/8234 ,  H01L21/02 ,  H01L29/06 ,  H01L29/66 ,  H01L29/49 ,  H01L27/088 ,  H01L21/311

CPC classification number: H01L21/823481 ,  H01L21/0228 ,  H01L21/31105 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/82345 ,  H01L21/823456 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7851

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a fin-shaped structure thereon; forming a first shallow trench isolation (STI) around the fin-shaped structure; dividing the fin-shaped structure into a first portion and a second portion; and forming a second STI between the first portion and the second portion.

公开(公告)号：US20240282637A1

公开(公告)日：2024-08-22

申请号：US18613151

申请日：2024-03-22

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ching-Ling Lin ,  Wen-An Liang ,  Chen-Ming Huang

IPC: H01L21/8234 ,  H01L21/764 ,  H01L27/088 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L21/823481 ,  H01L21/764 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785

Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a gate structure on the fin-shaped structure and an interlayer dielectric (ILD) layer around the gate structure, and a single diffusion break (SDB) structure in the ILD layer and the fin-shaped structure. Preferably, the SDB structure includes a bottom portion and a top portion on the bottom portion, in which the top portion and the bottom portion include different widths.

公开(公告)号：US11972984B2

公开(公告)日：2024-04-30

申请号：US18088631

申请日：2022-12-26

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ching-Ling Lin ,  Wen-An Liang ,  Chen-Ming Huang

IPC: H01L21/8234 ,  H01L21/764 ,  H01L27/088 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L21/823481 ,  H01L21/764 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785

Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a gate structure on the fin-shaped structure and an interlayer dielectric (ILD) layer around the gate structure, and a single diffusion break (SDB) structure in the ILD layer and the fin-shaped structure. Preferably, the SDB structure includes a bottom portion and a top portion on the bottom portion, in which the top portion and the bottom portion include different widths.