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    METHOD FOR FORMING SEMICONDUCTOR PATTERN
    11.
    发明申请
    METHOD FOR FORMING SEMICONDUCTOR PATTERN 审中-公开

    公开(公告)号：US20200212048A1

    公开(公告)日：2020-07-02

    申请号：US16258657

    申请日：2019-01-27

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Gang-Yi Lin ,  Shih-Fang Tzou ,  Fu-Che Lee ,  Feng-Yi Chang ,  Ying-Chih Lin ,  Kai-Lou Huang ,  Yi-Ching Chang

    IPC: H01L27/108

    Abstract: The present invention provides a method for forming a semiconductor pattern, comprising: firstly, a target layer is provided and a first material layer is formed on the target layer, and then a first pattern is formed on the first material layer, followed by a first self-aligned double pattering step is performed, a plurality of first grooves are formed in the first material layer. Next, a second material layer is formed on the first material layer, and a plurality of second grooves are formed in the second material layer. Next, transferring a pattern of the overlapping portion of the first grooves and the second grooves into the target layer, the target layer includes a plurality of third patterns and a plurality of fourth patterns, an area of each fourth pattern is larger than an area of each third pattern.

    Method for fabricating air gap adjacent to two sides of bit line
    13.
    发明授权
    Method for fabricating air gap adjacent to two sides of bit line 有权

    公开(公告)号：US10418367B2

    公开(公告)日：2019-09-17

    申请号：US16029638

    申请日：2018-07-08

    Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

    Inventor： Yi-Ching Chang ,  Feng-Yi Chang ,  Fu-Che Lee ,  Chieh-Te Chen

    IPC: H01L21/768 ,  H01L27/108

    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a cell region and a peripheral region; forming a bit line structure on the cell region and a gate structure on the peripheral region; forming an interlayer dielectric (ILD) layer around the bit line structure and the gate structure; forming a conductive layer on the bit line structure; performing a first photo-etching process to remove part of the conductive layer for forming storage contacts adjacent two sides of the bit line structure and contact plugs adjacent to two sides of the gate structure; forming a first cap layer on the cell region and the peripheral region to cover the bit line structure and the gate structure; and performing a second photo-etching process to remove part of the first cap layer on the cell region.

    Semiconductor device and method for fabricating the same
    15.
    发明授权
    Semiconductor device and method for fabricating the same 有权

    公开(公告)号：US10043809B1

    公开(公告)日：2018-08-07

    申请号：US15632394

    申请日：2017-06-26

    Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

    Inventor： Yi-Ching Chang ,  Feng-Yi Chang ,  Fu-Che Lee ,  Chieh-Te Chen

    IPC: H01L27/108 ,  H01L21/768

    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a cell region and a peripheral region; forming a bit line structure on the cell region and a gate structure on the peripheral region; forming an interlayer dielectric (ILD) layer around the bit line structure and the gate structure; forming a conductive layer on the bit line structure; performing a first photo-etching process to remove part of the conductive layer for forming storage contacts adjacent two sides of the bit line structure and contact plugs adjacent to two sides of the gate structure; forming a first cap layer on the cell region and the peripheral region to cover the bit line structure and the gate structure; and performing a second photo-etching process to remove part of the first cap layer on the cell region.

    METHOD OF FORMING SEMICONDUCTOR DEVICE
    17.
    发明申请
    METHOD OF FORMING SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210265462A1

    公开(公告)日：2021-08-26

    申请号：US17317912

    申请日：2021-05-12

    Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

    Inventor： Feng-Yi Chang ,  Fu-Che Lee ,  Yi-Ching Chang ,  Kai-Lou Huang ,  Ying-Chih Lin ,  Gang-Yi Lin

    IPC: H01L29/06 ,  H01L21/027 ,  H01L29/66 ,  H01L21/3213 ,  H01L21/033 ,  H01L21/311

    Abstract: A semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a gate structure, a first dielectric layer, a second dielectric layer, a first plug and two metal lines. The substrate has a shallow trench isolation and an active area, and the gate structure is disposed on the substrate to cover a boundary between the active area and the shallow trench isolation. The first dielectric layer is disposed on the substrate, to cover the gate structure, and the first plug is disposed in the first dielectric layer to directly in contact with a conductive layer of the gate structure and the active area. The second dielectric layer is disposed on the first dielectric layer, with the first plug and the gate being entirely covered by the first dielectric layer and the second dielectric layer. The two metal lines are disposed in the second dielectric layer.

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