公开(公告)号：US20170353534A1

公开(公告)日：2017-12-07

申请号：US15687057

申请日：2017-08-25

Applicant: VMware, Inc.

Inventor： Reza Taheri ,  Kalyan Saladi ,  Daniel Michael Hecht ,  Jin Heo ,  Jeffrey Buell

IPC: H04L29/08 ,  H04L12/26

CPC classification number: H04L67/10 ,  H04L43/00 ,  H04L67/1097

Abstract: The current document is directed to virtualized PMUs provided by virtualization layers. The currently disclosed virtualized PMUs are decoupled from the underlying PMU hardware features of processors on which the virtualization layer executes. The decoupling is achieved, in part, by time multiplexing the underlying hardware PMU registers to provide a greater number of virtualized PMU registers than the number of hardware-PMU registers provided by at least some of the underlying hardware PMUs. The decoupling is also achieved by providing for monitoring, by the virtualized PMU registers, of computed processor events and approximated processor events in addition to the processor events monitored by the underlying hardware PMUs. In addition, the virtualized PMU registers are implemented, in certain implementations, to support a variety of different monitoring modes, including monitoring of processor events that occur only during execution of the virtualization layer and monitoring of hardware-thread-specific processor events.

公开(公告)号：US09756118B2

公开(公告)日：2017-09-05

申请号：US14263640

申请日：2014-04-28

Applicant: VMware, Inc.

Inventor： Reza Taheri ,  Kalyan Saladi ,  Daniel Michael Hecht ,  Jin Heo ,  Jeffrey Buell

IPC: G06F9/455 ,  H04L29/08 ,  H04L12/26

CPC classification number: H04L67/10 ,  H04L43/00 ,  H04L67/1097

Abstract: The current document is directed to virtualized PMUs provided by virtualization layers. The currently disclosed virtualized PMUs are decoupled from the underlying PMU hardware features of processors on which the virtualization layer executes. The decoupling is achieved, in part, by time multiplexing the underlying hardware PMU registers to provide a greater number of virtualized PMU registers than the number of hardware-PMU registers provided by at least some of the underlying hardware PMUs. The decoupling is also achieved by providing for monitoring, by the virtualized PMU registers, of computed processor events and approximated processor events in addition to the processor events monitored by the underlying hardware PMUs. In addition, the virtualized PMU registers are implemented, in certain implementations, to support a variety of different monitoring modes, including monitoring of processor events that occur only during execution of the virtualization layer and monitoring of hardware-thread-specific processor events.

公开(公告)号：US09317318B2

公开(公告)日：2016-04-19

申请号：US14468122

申请日：2014-08-25

Applicant: VMware, Inc.

Inventor： Haoqiang Zheng ,  Lenin Singaravelu ,  Shilpi Agarwal ,  Daniel Michael Hecht ,  Garrett Smith

IPC: G06F9/455 ,  H04L12/875 ,  H04L12/26 ,  H04L12/927 ,  G06F13/24 ,  G06F9/50

CPC classification number: G06F9/4812 ,  G06F9/45533 ,  G06F9/45558 ,  G06F9/4887 ,  G06F9/50 ,  G06F9/5027 ,  G06F9/5033 ,  G06F9/5088 ,  G06F13/24 ,  G06F2009/4557 ,  G06F2009/45575 ,  G06F2009/45591 ,  G06F2209/5017 ,  H04L43/0894 ,  H04L43/16 ,  H04L47/56 ,  H04L47/801

Abstract: A host computer has a virtualization software that supports execution of a plurality of virtual machines, where the virtualization software includes a virtual machine monitor for each of the virtual machines, and where each virtual machine monitor emulates a virtual central processing unit (CPU) for a corresponding virtual machine. A virtual machine monitor halts execution of a virtual CPU of a virtual machine by receiving a first halt instruction from a corresponding virtual machine and determining whether the virtual machine is latency sensitive. If the virtual machine is latency sensitive, then a second halt instruction is issued from the virtual machine monitor to halt a physical CPU on which the virtual CPU executes. If the virtual machine is not latency sensitive, then a system call to a kernel executing on the host computer is executed to indicate to the kernel that the virtual CPU is in an idle state.

Abstract translation: 主计算机具有支持执行多个虚拟机的虚拟化软件，其中虚拟化软件包括虚拟机中的每个虚拟机的虚拟机监视器，并且其中每个虚拟机监视器模拟虚拟中央处理单元（CPU），用于 对应的虚拟机。 虚拟机监视器通过从对应的虚拟机接收到第一暂停指令并且确定虚拟机是否对时延敏感来停止虚拟机的虚拟CPU的执行。 如果虚拟机延迟敏感，则从虚拟机监视器发出第二个暂停指令，以停止虚拟CPU执行的物理CPU。 如果虚拟机不是延迟敏感的，则执行对主机上执行的内核的系统调用，以向内核指示虚拟CPU处于空闲状态。

公开(公告)号：US20150254087A1

公开(公告)日：2015-09-10

申请号：US14721461

申请日：2015-05-26

Applicant: VMware, Inc.

Inventor： Benjamin Charles Serebrin ,  Daniel Michael Hecht

IPC: G06F9/455 ,  G06F11/34

CPC classification number: G06F9/45533 ,  G06F9/455 ,  G06F9/45558 ,  G06F11/3466 ,  G06F2009/45591 ,  G06F2201/815 ,  G06F2201/86 ,  G06F2201/88

Abstract: Methods, apparatus, and articles of manufacture to virtualize performance counters are disclosed. An example method includes dividing performance events to be counted into a plurality of classes; assigning a first virtual performance counter of a virtual machine to a first performance event type in a first one of the classes; assigning a second virtual performance counter of the virtual machine to a second performance event type in a second one of the classes different from the first class; incrementing the first virtual performance counter in response to a first occurrence of the first performance event type during direct execution of guest instructions by the virtual machine; and not incrementing the first virtual performance counter in response to a second occurrence of the first performance event type during execution of emulated instructions by a hypervisor on behalf of the virtual machine.

Abstract translation: 公开了虚拟化性能计数器的方法，装置和制造。 示例性方法包括将要计数的性能事件划分为多个类; 在第一类中将虚拟机的第一虚拟性能计数器分配给第一性能事件类型; 将所述虚拟机的第二虚拟性能计数器分配到与所述第一类不同的第二类中的第二性能事件类型; 在虚拟机的直接执行访客指令期间响应于第一性能事件类型的第一次出现来增加第一虚拟性能计数器; 并且在虚拟机管理程序代表虚拟机执行仿真指令期间，不响应于第一执行事件类型的第二次出现来递增第一虚拟性能计数器。