公开(公告)号：US09349750B2

公开(公告)日：2016-05-24

申请号：US14077390

申请日：2013-11-12

申请人： Hiroyuki Miyake ,  Shunpei Yamazaki ,  Yoshifumi Tanada ,  Manabu Sato ,  Toshinari Sasaki ,  Kenichi Okazaki ,  Junichi Koezuka ,  Takuya Matsuo ,  Hiroshi Matsukizono ,  Yosuke Kanzaki ,  Shigeyasu Mori

发明人： Hiroyuki Miyake ,  Shunpei Yamazaki ,  Yoshifumi Tanada ,  Manabu Sato ,  Toshinari Sasaki ,  Kenichi Okazaki ,  Junichi Koezuka ,  Takuya Matsuo ,  Hiroshi Matsukizono ,  Yosuke Kanzaki ,  Shigeyasu Mori

IPC分类号： H01L27/12 ,  H01L29/786

CPC分类号： H01L27/1225 ,  H01L27/124 ,  H01L29/78648

摘要： A semiconductor device includes: a transistor including a gate electrode, a gate insulating film over the gate electrode, a semiconductor layer over the gate insulating film, and a source electrode and a drain electrode over the semiconductor layer; a first insulating film comprising an inorganic material over the transistor; a second insulating film comprising an organic material over the first insulating film; a first conductive film over the second insulating film and in a region overlapping with the semiconductor layer; a third insulating film comprising an inorganic material over the first conductive film; and a second conductive film over the third insulating film and in a region overlapping with the first conductive film. The absolute value of a first potential applied to the first conductive film is greater than the absolute value of a second potential applied to the second conductive film.

摘要翻译： 半导体器件包括：晶体管，包括栅极电极，栅极上的栅极绝缘膜，栅极绝缘膜上的半导体层，以及半导体层上的源极和漏极; 包括晶体管上的无机材料的第一绝缘膜; 包括在所述第一绝缘膜上的有机材料的第二绝缘膜; 在所述第二绝缘膜上并且在与所述半导体层重叠的区域中的第一导电膜; 在所述第一导电膜上包括无机材料的第三绝缘膜; 以及在所述第三绝缘膜上并且在与所述第一导电膜重叠的区域中的第二导电膜。 施加到第一导电膜的第一电位的绝对值大于施加到第二导电膜的第二电位的绝对值。

公开(公告)号：US09312278B2

公开(公告)日：2016-04-12

申请号：US14062085

申请日：2013-10-24

申请人： Junichi Koezuka ,  Yukinori Shima ,  Yasuharu Hosaka ,  Kenichi Okazaki ,  Takuya Matsuo ,  Shigeyasu Mori ,  Yosuke Kanzaki ,  Hiroshi Matsukizono

发明人： Junichi Koezuka ,  Yukinori Shima ,  Yasuharu Hosaka ,  Kenichi Okazaki ,  Takuya Matsuo ,  Shigeyasu Mori ,  Yosuke Kanzaki ,  Hiroshi Matsukizono

IPC分类号： H01L27/12 ,  H01L27/32

CPC分类号： H01L27/1225 ,  H01L27/3262

摘要： To improve the reliability of a transistor as well as to inhibit fluctuation in electric characteristics. A display device includes a pixel portion and a driver circuit portion outside the pixel portion; the pixel portion includes a pixel transistor, a first insulating film covering the pixel transistor and including an inorganic material, a second insulating film including an organic material over the first insulating film, and a third insulating film including an inorganic material over the second insulating film; and the driver circuit portion includes a driving transistor to supply a signal to the pixel transistor, the first insulating film covering the driving transistor, and the second insulating film over the first insulating film, and further includes a region in which the third insulating film is not formed over the second insulating film or a region in which the second insulating film is not covered with the third insulating film.

摘要翻译： 提高晶体管的可靠性以及抑制电特性的波动。 显示装置包括像素部分和像素部分外部的驱动器电路部分; 像素部分包括像素晶体管，覆盖像素晶体管并且包括无机材料的第一绝缘膜，在第一绝缘膜上的包括有机材料的第二绝缘膜，以及在第二绝缘膜上的包括无机材料的第三绝缘膜 ; 并且所述驱动电路部分包括驱动晶体管，用于向所述像素晶体管提供信号，所述第一绝缘膜覆盖所述驱动晶体管，并且所述第二绝缘膜在所述第一绝缘膜上方，并且还包括所述第三绝缘膜为 不形成在第二绝缘膜上或第二绝缘膜未被第三绝缘膜覆盖的区域。

公开(公告)号：US09659968B2

公开(公告)日：2017-05-23

申请号：US14244419

申请日：2014-04-03

申请人： Junichi Koezuka ,  Masahiro Katayama ,  Yukinori Shima ,  Kenichi Okazaki ,  Takuya Matsuo ,  Shigeyasu Mori ,  Yosuke Kanzaki ,  Hiroshi Matsukizono

发明人： Junichi Koezuka ,  Masahiro Katayama ,  Yukinori Shima ,  Kenichi Okazaki ,  Takuya Matsuo ,  Shigeyasu Mori ,  Yosuke Kanzaki ,  Hiroshi Matsukizono

IPC分类号： H01L27/12 ,  H01L23/00 ,  H01L23/31

CPC分类号： H01L27/1225 ,  H01L23/3121 ,  H01L23/564 ,  H01L27/1248 ,  H01L2924/0002 ,  H01L2924/0001 ,  H01L2924/00

摘要： Variation in the electrical characteristics of transistors is minimized and reliability of the transistors is improved. A display device includes a pixel portion 104 and a driver circuit portion 106 outside the pixel portion. The pixel portion includes a pixel transistor, a first insulating layer 122 which covers the pixel transistor and includes an inorganic material, a second insulating layer 124 which is over the first insulating layer and includes an organic material, and a third insulating layer 128 which is over the second insulating layer and includes an inorganic material. The driver circuit portion includes a driving transistor for supplying a signal to the pixel transistor, and the first insulating layer covering the driving transistor. The second insulating layer is not formed in the driver circuit portion.

公开(公告)号：US09196743B2

公开(公告)日：2015-11-24

申请号：US13860855

申请日：2013-04-11

申请人： Masatoshi Yokoyama ,  Tsutomu Murakawa ,  Kenichi Okazaki ,  Masayuki Sakakura ,  Takuya Matsuo ,  Akihiro Oda ,  Shigeyasu Mori ,  Yoshitaka Yamamoto

发明人： Masatoshi Yokoyama ,  Tsutomu Murakawa ,  Kenichi Okazaki ,  Masayuki Sakakura ,  Takuya Matsuo ,  Akihiro Oda ,  Shigeyasu Mori ,  Yoshitaka Yamamoto

IPC分类号： H01L29/10 ,  H01L29/786

CPC分类号： H01L29/7869

摘要： Provided is a semiconductor device in which generation of a parasitic channel in an end region of an oxide semiconductor film is suppressed. The semiconductor device includes a gate electrode, an oxide semiconductor film, a source electrode and a drain electrode, and a channel region formed in the oxide semiconductor film. The channel region is formed between a first side surface of the source electrode and a second side surface of the drain electrode opposite to the first side surface. The oxide semiconductor film has an end region which does not overlap with the gate electrode. The end region which does not overlap with the gate electrode is positioned between a first region that is the nearest to one end of the first side surface and a second region that is the nearest to one end of the second side surface.

摘要翻译： 提供了抑制氧化物半导体膜的端部区域中的寄生通道的产生的半导体装置。 半导体器件包括栅电极，氧化物半导体膜，源电极和漏极，以及形成在氧化物半导体膜中的沟道区。 沟道区形成在源电极的第一侧表面和与第一侧表面相对的漏电极的第二侧表面之间。 氧化物半导体膜具有不与栅电极重叠的端部区域。 不与栅电极重叠的端部区域位于最靠近第一侧表面的一端的第一区域和最靠近第二侧表面的一端的第二区域之间。

公开(公告)号：US4104041A

公开(公告)日：1978-08-01

申请号：US748541

申请日：1976-12-08

申请人： Hidemasa Arita ,  Hitoshi Tomiyama ,  Shigeyasu Mori

发明人： Hidemasa Arita ,  Hitoshi Tomiyama ,  Shigeyasu Mori

IPC分类号： B01D47/06 ,  B01D47/00

CPC分类号： B01D47/06

摘要： This invention relates to a process for treating the waste gas discharged from a urea prilling tower and an apparatus therefor. More particularly, this invention relates to a process for treating the waste gas discharged from a urea prilling tower and an apparatus therefor, characterized by that a continuous liquid or water film flow (hereinafter called merely a liquid film) of a scrubbing solution and/or an absorption liquid (hereinafter called merely a scrubbing solution) is formed so as to traverse across the whole passage of the waste gas within the scrubbing tower, and when the waste gas passes through such a liquid film the fumy minute particles (hereinafter called fumes) of urea, about 1 micron in size, which are contained in said waste gas, are removed by contacting with the scrubbing solution.

摘要翻译： 本发明涉及一种处理从尿素造粒塔排出的废气的方法及其装置。 更具体地说，本发明涉及一种用于处理从尿素造粒塔排出的废气及其装置的方法，其特征在于，连续的液体或水膜流动（以下仅称为液膜）为洗涤液和/或 形成吸收液体（以下简称为洗涤液），以遍及洗涤塔内的废气的整个通道，当废气通过这样的液膜时，蒸馏微粒子（以下称为烟雾） 通过与洗涤溶液接触除去所述废气中所含的大约1微米尺寸的尿素。

公开(公告)号：US09748399B2

公开(公告)日：2017-08-29

申请号：US14246493

申请日：2014-04-07

申请人： Junichi Koezuka ,  Kenichi Okazaki ,  Masahiro Takahashi ,  Takuya Matsuo ,  Shigeyasu Mori ,  Yosuke Kanzaki ,  Hiroshi Matsukizono

发明人： Junichi Koezuka ,  Kenichi Okazaki ,  Masahiro Takahashi ,  Takuya Matsuo ,  Shigeyasu Mori ,  Yosuke Kanzaki ,  Hiroshi Matsukizono

IPC分类号： H01L29/786 ,  H01L29/04 ,  H01L29/66 ,  H01L27/12

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/04 ,  H01L29/045 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/78696

摘要： To provide a novel semiconductor device in which a reduction in channel length is controlled. The semiconductor device includes an oxide semiconductor layer having a crystal part, and a source electrode layer and a drain electrode layer which are in contact with the oxide semiconductor layer. The oxide semiconductor layer includes a channel formation region and an n-type region in contact with the source electrode layer or the drain electrode layer. The crystal orientation of the crystal part is different between the channel formation region and the n-type region.

公开(公告)号：US20100207120A1

公开(公告)日：2010-08-19

申请号：US12676945

申请日：2008-05-23

申请人： Tomohiro Kimura ,  Shigeyasu Mori

发明人： Tomohiro Kimura ,  Shigeyasu Mori

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L27/127 ,  H01L21/26513 ,  H01L27/1214 ,  H01L27/1237 ,  H01L29/105

摘要： The present invention provides a production method of a semiconductor device and a semiconductor device that permits suppression of a leakage current. A production method of a semiconductor device includes a structure in which a semiconductor layer, an insulating film, and a gate electrode are stacked on a main surface of a substrate in this order, the method comprises an impurity-adding step of: adding impurities to at least a portion of the semiconductor layer, the portion facing the gate electrode, so that a portion of the semiconductor layer, the portion being an edge region and facing the gate electrode, has an impurity concentration greater than an impurity concentration of a portion of the semiconductor layer, the portion being a non-edge region and facing the gate electrode.

摘要翻译： 本发明提供了允许抑制漏电流的半导体器件和半导体器件的制造方法。 半导体器件的制造方法包括以下结构：其中半导体层，绝缘膜和栅极电极依次堆叠在基板的主表面上，该方法包括杂质添加步骤：将杂质添加到 半导体层的至少一部分，面对栅电极的部分，使得半导体层的一部分，边缘区域的一部分并且面对栅电极的杂质浓度大于一部分的杂质浓度 半导体层，该部分是非边缘区域并面向栅电极。