公开(公告)号：US06735112B2

公开(公告)日：2004-05-11

申请号：US10068465

申请日：2002-02-06

申请人： Theodore Zhu ,  Yong Lu ,  Anthony Arrott

发明人： Theodore Zhu ,  Yong Lu ,  Anthony Arrott

IPC分类号： G11C1115

CPC分类号： G11C11/16 ,  G11C11/15

摘要： A magneto-resistive memory comprising magneto-resistive memory cells is disclosed, comprising two pinned magnetic layers on one side of a free magnetic layer. The pinned magnetic layers are formed with anti-parallel magnetization orientations such that a net magnetic moment of the two layers is substantially zero. The influence of pinned magnetic layers on free magnetic layer magnetization orientations is substantially eliminated, allowing for increased predictability in switching behavior and increased write selectivity of memory cells.

摘要翻译： 公开了包括磁阻存储器单元的磁阻存储器，其包括在自由磁性层的一侧上的两个固定磁性层。 被钉扎的磁性层形成为具有反平行磁化取向，使得两层的净磁矩基本为零。 固有磁性层对自由磁性层磁化取向的影响基本上消除了，从而增加了开关行为的可预测性和增加了存储单元的写入选择性。

公开(公告)号：US06671834B1

公开(公告)日：2003-12-30

申请号：US09618492

申请日：2000-07-18

申请人： Theodore Zhu ,  Gary Kirchner ,  Richard W. Swanson ,  Yong Lu

发明人： Theodore Zhu ,  Gary Kirchner ,  Richard W. Swanson ,  Yong Lu

IPC分类号： G11C2900

CPC分类号： G11C29/808 ,  G11C29/846

摘要： A redundancy scheme for a memory is disclosed that is programmable both before and after the memory device is packaged and/or installed in a system. This is preferably accomplished by using programmable non-volatile memory elements to control the replacement circuitry. Because the programmable memory elements are non-volatile, the desired replacement configuration is not lost during shipping, or if power is lost in a system. By allowing post-packaging replacement of defective memory elements, the overall yield of the device may be improved. By allowing post system installation replacement of defective memory elements, the reliability of many systems may be improved. In addition, the disclosed redundancy scheme allows two or more defective memory elements from different rows or columns to be replaced with memory elements from a single redundant low or column. This provides added flexibility during the replacement process.

摘要翻译： 公开了一种用于存储器的冗余方案，其在存储器件被封装和/或安装在系统中之前和之后是可编程的。 这优选地通过使用可编程非易失性存储器元件来控制替换电路来实现。 由于可编程存储器元件是非易失性的，所以在运输过程中，或者系统中的电源丢失时，所需的更换配置不会丢失。 通过允许更换缺陷存储元件的后期封装，可以提高器件的整体产量。 通过允许后置系统安装更换有缺陷的存储器元件，可以提高许多系统的可靠性。 此外，所公开的冗余方案允许来自不同行或列的两个或更多个有缺陷的存储器元件被来自单个冗余低或列的存储器元件替换。 这在更换过程中提供了更多的灵活性。

公开(公告)号：US06424564B1

公开(公告)日：2002-07-23

申请号：US09964217

申请日：2001-09-26

申请人： Shaoping Li ,  Theodore Zhu ,  Anthony S. Arrott ,  Harry Liu ,  William L. Larson ,  Yong Lu

发明人： Shaoping Li ,  Theodore Zhu ,  Anthony S. Arrott ,  Harry Liu ,  William L. Larson ,  Yong Lu

IPC分类号： G11C1100

摘要： MRAM architectures are disclosed that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The major axes of the magneto-resistive bits are offset relative to the axes of the digital lines to produce a magnetic field component from the digital line current that extends along the major axis of the magneto-resistive bits.

公开(公告)号：US06424561B1

公开(公告)日：2002-07-23

申请号：US09618504

申请日：2000-07-18

申请人： Shaoping Li ,  Theodore Zhu ,  Anthony S. Arrott ,  Harry Liu ,  William L. Larson ,  Yong Lu

发明人： Shaoping Li ,  Theodore Zhu ,  Anthony S. Arrott ,  Harry Liu ,  William L. Larson ,  Yong Lu

IPC分类号： G11C1100

CPC分类号： G11C11/16 ,  G11C11/15 ,  H01L27/222

摘要： MRAM architectures are disclosed that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The major axes of the magneto-resistive bits are offset relative to the axes of the digital lines to produce a magnetic field component from the digital line current that extends along the major axis of the magneto-resistive bits.

摘要翻译： 公开了在不显着降低存储器的封装密度的情况下产生增加的写入裕度和写入选择性的MRAM架构。 磁阻位的主轴相对于数字线的轴线偏移，以从沿着磁阻位的长轴延伸的数字线电流产生磁场分量。

公开(公告)号：US06134138A

公开(公告)日：2000-10-17

申请号：US365308

申请日：1999-07-30

申请人： Yong Lu ,  Theodore Zhu

发明人： Yong Lu ,  Theodore Zhu

IPC分类号： G11C11/14 ,  G11C11/15 ,  G11C11/16 ,  H01L21/8246 ,  H01L27/105 ,  H01L43/08 ,  G11C11/00

CPC分类号： G11C11/16

摘要： A method and apparatus for reading a magnetoresistive memory is disclosed wherein the wordline current is turned off during selected sensing operations. This substantially eliminates the noise that is typically injected by the wordline current into the bit structures during the sensing operations, which increases the signal-to-noise ratio on the sense lines. This, in turn, significantly increases the speed of the sensing operations and thus the read access time of the memory. Substantial power savings are also realized.

摘要翻译： 公开了一种用于读取磁阻存储器的方法和装置，其中在所选择的感测操作期间，字线电流被关断。 这实质上消除了在感测操作期间通常由字线电流注入到位结构中的噪声，这增加了感测线上的信噪比。 这反过来显着增加了感测操作的速度，从而显着提高了存储器的读取访问时间。 也实现了大量的省电。

公开(公告)号：US07389451B2

公开(公告)日：2008-06-17

申请号：US11067356

申请日：2005-02-25

申请人： Theodore Zhu ,  Gary Kirchner ,  Richard W. Swanson ,  Yong Lu

发明人： Theodore Zhu ,  Gary Kirchner ,  Richard W. Swanson ,  Yong Lu

IPC分类号： G01C29/00

CPC分类号： G11C29/808 ,  G11C29/846

摘要： A redundancy scheme for a memory is disclosed that is programmable both before and after the memory device is packaged and/or installed in a system. This is preferably accomplished by using programmable non-volatile memory elements to control the replacement circuitry. Because the programmable memory elements are non-volatile, the desired replacement configuration is not lost during shipping, or if power is lost in a system. By allowing post-packaging replacement of defective memory elements, the overall yield of the device may be improved. By allowing post system installation replacement of defective memory elements, the reliability of many systems may be improved. In addition, the disclosed redundancy scheme allows two or more defective memory elements from different rows or columns to be replaced with memory elements from a single redundant low or column. This provides added flexibility during the replacement process.

摘要翻译： 公开了一种用于存储器的冗余方案，其在存储器件被封装和/或安装在系统中之前和之后是可编程的。 这优选地通过使用可编程非易失性存储器元件来控制替换电路来实现。 由于可编程存储器元件是非易失性的，所以在运输过程中或者系统中的电源丢失时，所需的更换配置不会丢失。 通过允许更换缺陷存储元件的后期封装，可以提高器件的整体产量。 通过允许后置系统安装更换有缺陷的存储器元件，可以提高许多系统的可靠性。 此外，所公开的冗余方案允许来自不同行或列的两个或更多个有缺陷的存储器元件被来自单个冗余行或列的存储器元件替换。 这在更换过程中提供了更多的灵活性。

公开(公告)号：US07208323B2

公开(公告)日：2007-04-24

申请号：US11148396

申请日：2005-06-07

申请人： Theodore Zhu ,  Yong Lu ,  Anthony Arrott ,  Joel Drewes

发明人： Theodore Zhu ,  Yong Lu ,  Anthony Arrott ,  Joel Drewes

IPC分类号： H01L21/00 ,  G11C11/15

CPC分类号： H01L43/08 ,  G11C11/15 ,  G11C11/16 ,  H01L27/222

摘要： A magneto-resistive memory comprising magneto-resistive memory cells is disclosed, comprising a pinned magnetic layer and a free magnetic layer. The two magnetic layers are formed having widened regions at the ends of the layers. As such, the shape made out by the magneto-resisitve memory, from a top-view perspective, is wide at the ends and narrower at the mid-, forming an I shape in one preferred embodiment. The end portions of the free magnetic layer are allowed to magnetically couple to the end portions of the pinned magnetic layer such that magnetic coupling is shifted to these widened regions and coupling in the mid-portion between the widened regions is minimized. Thus, the influence of the pinned magnetic layer on the magnetization orientation of the mid-portion of the free magnetic layer is substantially eliminated, allowing for increased predictability in switching behavior and increased write selectivity of memory cells.

摘要翻译： 公开了一种包括磁阻存储器单元的磁阻存储器，包括固定磁性层和自由磁性层。 两个磁性层在层的端部形成有加宽区域。 因此，从顶视角看，由磁光存储器形成的形状在端部宽，在中间较窄，在一个优选实施例中形成I形状。 允许自由磁性层的端部磁耦合到被钉扎的磁性层的端部，使得磁耦合转移到这些加宽的区域，并且在加宽区域之间的中间部分处的耦合被最小化。 因此，钉扎磁性层对自由磁性层的中间部分的磁化取向的影响基本上被消除，从而允许提高存储器单元的开关行为的可预测性和增加的写入选择性。

公开(公告)号：US07200035B2

公开(公告)日：2007-04-03

申请号：US11146482

申请日：2005-06-06

申请人： Theodore Zhu ,  Yong Lu ,  Anthony Arrott

发明人： Theodore Zhu ,  Yong Lu ,  Anthony Arrott

IPC分类号： G11C11/14 ,  G11C11/15 ,  H01L29/82 ,  H01L43/00 ,  G11B5/39 ,  G11B5/31

CPC分类号： G11C11/16 ,  G11C11/15

摘要： A magneto-resistive memory comprising magneto-resistive memory cells is disclosed, comprising two pinned magnetic layers on one side of a free magnetic layer. The pinned magnetic layers are formed with anti-parallel magnetization orientations such that a net magnetic moment of the two layers is substantially zero. The influence of pinned magnetic layers on free magnetic layer magnetization orientations is substantially eliminated, allowing for increased predictability in switching behavior and increased write selectivity of memory cells.

摘要翻译： 公开了包括磁阻存储器单元的磁阻存储器，其包括在自由磁性层的一侧上的两个固定磁性层。 被钉扎的磁性层形成为具有反平行磁化取向，使得两层的净磁矩基本为零。 固有磁性层对自由磁性层磁化取向的影响基本上消除了，从而增加了开关行为的可预测性和增加了存储单元的写入选择性。

公开(公告)号：US20050226039A1

公开(公告)日：2005-10-13

申请号：US11146482

申请日：2005-06-06

申请人： Theodore Zhu ,  Yong Lu ,  Anthony Arrott

发明人： Theodore Zhu ,  Yong Lu ,  Anthony Arrott

IPC分类号： G11C11/00 ,  G11C11/15

CPC分类号： G11C11/16 ,  G11C11/15

摘要： A magneto-resistive memory comprising magneto-resistive memory cells is disclosed, comprising two pinned magnetic layers on one side of a free magnetic layer. The pinned magnetic layers are formed with anti-parallel magnetization orientations such that a net magnetic moment of the two layers is substantially zero. The influence of pinned magnetic layers on free magnetic layer magnetization orientations is substantially eliminated, allowing for increased predictability in switching behavior and increased write selectivity of memory cells.

摘要翻译： 公开了包括磁阻存储器单元的磁阻存储器，其包括在自由磁性层的一侧上的两个固定磁性层。 被钉扎的磁性层形成为具有反平行磁化取向，使得两层的净磁矩基本为零。 固有磁性层对自由磁性层磁化取向的影响基本上消除了，从而增加了开关行为的可预测性和增加了存储单元的写入选择性。

公开(公告)号：US06522576B2

公开(公告)日：2003-02-18

申请号：US09992213

申请日：2001-11-14

申请人： Yong Lu ,  Theodore Zhu ,  Romney R. Katti

发明人： Yong Lu ,  Theodore Zhu ,  Romney R. Katti

IPC分类号： G11C1100

CPC分类号： G11C11/5607 ,  G11C7/06 ,  G11C11/15

摘要： A low power, high speed magneto-resistive memory is disclosed. The disclosed memory directly senses the resistive state of one or more magneto-resistive memory elements. This allows the memory to be read during a single read cycle, without the need for a word line current. This may substantially increase the speed and reduce the power of the memory.