公开(公告)号：US6141734A

公开(公告)日：2000-10-31

申请号：US17752

申请日：1998-02-03

Applicant: Rahul Razdan ,  David Arthur James Webb, Jr. ,  James Keller ,  Derrick R. Meyer ,  Daniel Lawrence Leibholz

Inventor： Rahul Razdan ,  David Arthur James Webb, Jr. ,  James Keller ,  Derrick R. Meyer ,  Daniel Lawrence Leibholz

IPC: G06F12/08 ,  G06F13/00

CPC classification number: G06F12/0815 ,  G06F9/3004 ,  G06F9/30072 ,  G06F9/30087

Abstract: A technique for implementing load-locked and store-conditional instruction primitives by using a local cache for information about exclusive ownership. The valid bit in particular provides information to properly execute load-locked and store-conditional instructions without the need for lock flag or local lock address registers for each individual locked address. Integrity of locked data is accomplished by insuring that load-locked and store-conditional instructions are processed in order, that no internal agents can evict blocks from a local cache as a side effect as their processing, that external agents update the context of cache memories first using invalidating probe commands, and that only non-speculative instructions are permitted to generate external commands.

Abstract translation: 一种用于通过使用本地缓存来获取关于独占所有权的信息来实现加载锁定和存储条件指令原语的技术。 有效位特别提供了正确执行加载锁定和存储条件指令的信息，而不需要锁定标志或每个单独锁定地址的本地锁定地址寄存器。 锁定数据的完整性通过确保按顺序处理加载锁定和存储条件指令来实现，即内部代理可以将本地缓存中的块作为其处理的副作用来驱逐块，外部代理更新缓存存储器的上下文 首先使用无效探测命令，并且只允许非推测性指令生成外部命令。

公开(公告)号：US6138222A

公开(公告)日：2000-10-24

申请号：US990400

申请日：1997-12-15

Applicant: Joshua S. Wyde ,  John Johann

Inventor： Joshua S. Wyde ,  John Johann

IPC: G06F3/06 ,  G06F12/00

CPC classification number: G06F3/0608 ,  G06F3/0632 ,  G06F3/0676

Abstract: A computer system includes a non-removable disk drive that has a capacity that may exceed 7.875 GB. The computer system generally includes a processor, a disk drive controller, a display, an input device, and a non-volatile memory device that includes firmware that is executed during system initialization. The storage capacity of the drive is reported by the drive in terms of numbers of cylinders, sectors, and heads during system initialization. In response, the firmware informs the operating system of the capacity of the drive. The firmware translates the reported cylinder and head numbers. If the reported capacity of the drive is equal to or greater than 4,032 gigabytes, the firmware limits the number of heads reported by the drive to a predetermined value. In accordance with another aspect of the invention, the capacity reported by the drive is compared to a threshold value. If the reported capacity is less than the threshold value, the firmware informs the operating system of the highest head number reported by the drive. If, however, the reported capacity is greater than or equal to the threshold value, the firmware reconfigures the drive to use a number of heads that is less than the number of heads the drive initially reported. In the latter situation (capacity greater than the threshold value) the computer's operating system and firmware preferably implement a service to permit access to the drive's full capacity. Another aspect of the invention permits a computer's operating system that cannot access the fall capacity of a drive greater than 7.875 GB to fully access the first 7.875 GB of the drive by limiting the number of cylinders to 16,383 cylinders.

Abstract translation: 计算机系统包括具有可能超过7.875GB的容量的不可移动磁盘驱动器。 计算机系统通常包括处理器，磁盘驱动器控制器，显示器，输入设备和包括在系统初始化期间执行的固件的非易失性存储器设备。 在系统初始化期间，驱动器的存储容量由磁盘数量，扇区数和磁头数量来报告。 作为响应，固件通知操作系统驱动器的容量。 固件翻译报告的气缸和头数。 如果报告的驱动器容量等于或大于4032 GB，则固件将驱动器报告的磁头数量限制为预定值。 根据本发明的另一方面，将驱动器报告的容量与阈值进行比较。 如果报告的容量小于阈值，固件会向操作系统通知驱动器报告的最高头数。 然而，如果报告的容量大于或等于阈值，则固件将驱动器重新配置为使用小于驱动器最初报告的磁头数量的多个磁头。 在后一种情况下（容量大于阈值），计算机的操作系统和固件优选地实施服务以允许访问驱动器的全部容量。 本发明的另一方面允许计算机的操作系统不能访问大于7.875GB的驱动器的跌倒能力，以通过将气缸数限制为16,383个气缸来完全访问第一个7.875 GB的驱动器。

公开(公告)号：US6137890A

公开(公告)日：2000-10-24

申请号：US851990

申请日：1997-05-06

Applicant: Mitchell Markow

Inventor： Mitchell Markow

IPC: H04R3/00 ,  H04R5/02 ,  H04R17/00 ,  H04R25/00

CPC classification number: H04R5/02 ,  H04R17/00 ,  H04R3/00

Abstract: Piezoelectric speaker achieves radiation efficiency at low frequencies by using a piezoelectric speaker panel as a lumped parameter resonator. The speaker panel is mounted in a resonant system for generating translational motion. The resonant system includes suspension devices for suspending the panel to allow for translational motion of the panel and isolators for tuning the speaker panel to a predetermined frequency. At the predetermined frequency, the speaker panel achieves resonance in a low order mode, producing improved radiation efficiency at lower frequencies and translational motion of the panel not possible with a piezoelectric activator alone. The speaker panel may be included in a portable computer system, a desktop computer monitor, or other sound systems. In a portable computer system, a display screen or front speaker panel serves as a lumped parameter resonator, and the lid or rear speaker panel serves as a structure born vibration resonator. The front speaker panel may be driven or excited by coupling a piezoelectric actuator or a plurality of actuators to the front speaker panel, the rear speaker panel, or both panels. When the piezoelectric actuator is coupled to the rear speaker panel, a connection between the panels transfers the vibration energy to the front speaker panel. Further, the actuator or actuators used may be placed at suitable locations on one or both panels.

Abstract translation: 压电扬声器通过使用压电扬声器面板作为集总参数谐振器来实现低频率的辐射效率。 扬声器面板安装在用于产生平移运动的谐振系统中。 谐振系统包括用于悬挂面板以允许面板和隔离器的平移运动的悬挂装置，用于将扬声器面板调谐到预定频率。 在预定频率下，扬声器面板以低阶模式实现谐振，在较低频率下产生改进的辐射效率，而仅使用压电激活器而不能进行平面运动。 扬声器面板可以包括在便携式计算机系统，台式计算机监视器或其他声音系统中。 在便携式计算机系统中，显示屏幕或前置扬声器面板用作集总参数谐振器，并且盖子或后置扬声器面板用作结构体振动谐振器。 可以通过将压电致动器或多个致动器耦合到前扬声器面板，后扬声器面板或两个面板来驱动或激励前置扬声器面板。 当压电致动器耦合到后扬声器面板时，面板之间的连接将振动能量传递到前扬声器面板。 此外，所使用的致动器或致动器可以放置在一个或两个面板上的适当位置。

公开(公告)号：US6137298A

公开(公告)日：2000-10-24

申请号：US986374

申请日：1997-12-05

Applicant: Byron Binns

Inventor： Byron Binns

IPC: G01R1/04 ,  G01R31/28 ,  G01R31/02

CPC classification number: G01R31/2886 ,  G01R1/04

Abstract: The system and method of the present invention facilitate clamping of a land grid array integrated circuit (LGA IC) device through adjustment and calibration of the clamping system in relation to the connector/socket features used for a given type of LGA IC device and connector/socket. In order to accommodate for different connector/socket heights, the clamping system of the present invention includes exchangeable calibrated springs and an exchangeable shim that enable the clamping system to adjust to a specific connector/socket height. Due to the level of calibration, the system and method provides controlled downward vertical force at the level of force required to clamp the pads of the LGA IC device to the contacts of the connector/socket thereby providing complete electric contact therebetween and complete electric contact between the connector/socket and a circuit board. Further, a heat sink and the material content of the supporting structure provide dissipation and stabilization of heat generated by the processor during testing. Still further, the clamping system provides for expeditious replacement of the LGA IC device.

Abstract translation: 本发明的系统和方法通过相对于用于给定类型的LGA IC器件和连接器/插座的连接器/插座特征的夹紧系统的调节和校准，便于夹紧平台栅格阵列集成电路（LGA IC） 插座。 为了适应不同的连接器/插座高度，本发明的夹紧系统包括可更换的校准弹簧和可更换的垫片，使得夹紧系统能够适应特定的连接器/插座高度。 由于校准水平，系统和方法在LGA IC器件的焊盘夹紧到连接器/插座的触点所需的力水平上提供受控的向下垂直力，从而在其间提供完全的电接触，并且完全电接触 连接器/插座和电路板。 此外，散热器和支撑结构的材料含量在测试期间提供由处理器产生的热量的耗散和稳定。 此外，夹紧系统提供了快速更换LGA IC器件。

公开(公告)号：US6134167A

公开(公告)日：2000-10-17

申请号：US90426

申请日：1998-06-04

Applicant: Lee W. Atkinson

Inventor： Lee W. Atkinson

IPC: G11C11/406 ,  G11C7/00

CPC classification number: G11C11/40626 ,  G11C11/406

Abstract: A computer system comprising an input/output device, a processor, a memory device, and a bridge logic device for interfacing the memory device to the processor and input/output device incorporates a refresh logic device for generating a memory refresh signal during suspend mode. Because the rate at which memory must be refreshed generally depends on the temperature of the memory device, the refresh logic varies the frequency of the refresh signal according to the temperature of the memory device, resulting in substantial power savings. In a preferred embodiment, the refresh logic uses a normal-rate refresh signal at the beginning of suspend mode and incrementally steps down the refresh rate as the memory temperature decreases. In other embodiments, the refresh logic incorporates a signal generator which produces a refresh signal at a frequency that varies according the output voltage from a temperature sensor or the temperature-sensitive resistance of a thermistor. In yet another embodiment, a variable-rate refresh logic is incorporated into the memory device, resulting in a self-refreshing memory module.

Abstract translation: 包括用于将存储器件与处理器和输入/输出设备接口的输入/输出设备，处理器，存储器件和桥接逻辑器件的计算机系统包括用于在暂停模式期间产生存储器刷新信号的刷新逻辑器件。 因为存储器必须刷新的速率通常取决于存储器件的温度，所以刷新逻辑根据存储器件的温度来改变刷新信号的频率，导致大量的功率节省。 在优选实施例中，刷新逻辑在暂停模式开始时使用正常速率刷新信号，并随着存储器温度降低逐渐降低刷新率。 在其他实施例中，刷新逻辑包括信号发生器，该信号发生器以根据温度传感器的输出电压或热敏电阻的温度敏感电阻变化的频率产生刷新信号。 在另一个实施例中，将可变速率刷新逻辑并入存储器件中，从而产生自刷新存储器模块。

公开(公告)号：US06128615A

公开(公告)日：2000-10-03

申请号：US877529

申请日：1997-06-17

Applicant: Mark E. Molloy

Inventor： Mark E. Molloy

IPC: G06F9/46 ,  G06F9/00

CPC classification number: G06F9/466 ,  Y10S707/955 ,  Y10S707/99938 ,  Y10S707/99944

Abstract: A shared bag, for collecting objects used in object oriented programming, implemented as a process pair resource manager intended to provide concurrent access to multiple threads. The process-pair implementation includes a concurrent aspect and a serial aspect. Each thread gains concurrent access to the shared bag through a registered transaction. The multiple threads can concurrently access the shared bag by passing messages to the concurrent aspect in order to add objects to, or remove objects from the shared bag. The concurrent aspect adds a description of each message, as well as the result of processing each message, to a transaction record associated with the transaction under which the thread is registered. The identity of each removed object is also recorded by the concurrent aspect in the transaction record. At the conclusion of a transaction, the concurrent aspect passes the transaction record to the serial aspect. The serial aspect then replays the transaction, using the transaction record. The serial aspect uses the object identities included in the transaction record to deterministically choose the order in which objects are removed during a transaction. Once the serial aspect has replayed the entire record, it commits or rolls back the transaction. In the event of process, processor, communication, or system failure, the shared bag is always recoverable to reflect all, and only, committed transactions.

Abstract translation: 用于收集面向对象编程中使用的对象的共享包，被实现为旨在提供对多个线程的并发访问的进程对资源管理器。 流程对实现包括并发方面和串行方面。 每个线程通过注册的事务获得对共享包的并发访问。 多个线程可以通过将消息传递到并发方面来同时访问共享包，以便将对象添加到共享包中或从共享包中删除对象。 并发方面将每个消息的描述以及处理每个消息的结果添加到与该线程被注册的事务相关联的事务记录。 每个删除对象的身份也由事务记录中的并发方面记录。 在事务结束时，并发方面将事务记录传递给串行方面。 然后，串行方面使用事务记录重播事务。 串行方面使用事务记录中包含的对象标识来确定性地选择事务中对象被删除的顺序。 一旦串行方面重播整个记录，它将提交或回滚事务。 在处理，处理器，通信或系统故障的情况下，共享包总是可恢复的，以反映所有且只有已提交的事务。

公开(公告)号：US6125449A

公开(公告)日：2000-09-26

申请号：US54617

申请日：1998-04-03

Applicant: Mark E. Taylor ,  Larry W. Kunkel ,  Gokalp Bayramoglu ,  Henry M. D'Souza ,  Valiuddin Ali

Inventor： Mark E. Taylor ,  Larry W. Kunkel ,  Gokalp Bayramoglu ,  Henry M. D'Souza ,  Valiuddin Ali

IPC: G06F1/26 ,  G06F1/32 ,  G09G1/00

CPC classification number: G06F1/26

Abstract: Method and apparatus of controlling a power state of a computer, the computer being connected to a monitor having a power control button. The computer is connected to the monitor over a video cable, and activation of the power control button is communicated to the computer over a wire in the video cable. In response to the activation signal, a system management interrupt is generated to invoke an SMI handler to change the power state of the computer. The power states of the computer include an ON state, an intermediate power state (such as Sleep state), and a suspend state (such as Soft-Off state).

Abstract translation: 控制计算机的电源状态的方法和装置，所述计算机连接到具有电源控制按钮的监视器。 计算机通过视频电缆连接到显示器，并且电源控制按钮的激活通过视频电缆中的电线传送到计算机。 响应于激活信号，产生系统管理中断以调用SMI处理程序来改变计算机的功率状态。 计算机的电源状态包括ON状态，中间功率状态（如睡眠状态）和暂停状态（如Soft-Off状态）。

公开(公告)号：US6122728A

公开(公告)日：2000-09-19

申请号：US17297

申请日：1998-02-02

Applicant: Daniel Lawrence Leibholz ,  Sharon Marie Britton ,  James Arthur Farrell ,  Timothy Charles Fischer

Inventor： Daniel Lawrence Leibholz ,  Sharon Marie Britton ,  James Arthur Farrell ,  Timothy Charles Fischer

IPC: G06F9/30 ,  G06F9/38 ,  G06F9/305

CPC classification number: G06F9/3838 ,  G06F9/30101 ,  G06F9/3857 ,  G06F9/3867

Abstract: A technique for processing register instructions in a pipeline data processor in which multiple instructions may be processed concurrently, and may therefore conflict with one another. Register instructions are identified with register groups indicating which processor registers are affected by the execution of the register instruction. The progress of the execution of the register instruction is then controlled depending upon the identified register groups, in order to avoid conflicts with other concurrently processed instructions.

Abstract translation: 一种用于处理流水线数据处理器中的寄存器指令的技术，其中可以同时处理多个指令，并且因此可能彼此冲突。 寄存器指令由寄存器组标识，指示哪些处理器寄存器受执行寄存器指令的影响。 然后根据所识别的寄存器组来控制寄存器指令的执行进度，以避免与其他并行处理指令的冲突。

公开(公告)号：US6122679A

公开(公告)日：2000-09-19

申请号：US39172

申请日：1998-03-13

Applicant: Russ Wunderlich

Inventor： Russ Wunderlich

IPC: G06F13/28

CPC classification number: G06F13/28 ,  Y10S707/99952

Abstract: A computer system implementing a distributed direct memory access architecture is disclosed. The computer system includes a re-map engine that includes control logic and a shadow register for each distributed DMA channel. Each shadow register includes 16 bytes of DMA configuration information that mirrors the current programming of the associated distributed DMA channel. When the CPU needs to program one or more DMA channels, the CPU sends a DMA master programming cycle to the control logic in the re-map engine. The re-map control logic compares the configuration data in the master cycle with the contents of the shadow registers and spawns daughter programming cycles to just those distributed channels for which a mismatch condition exists. If a match exists with respect to a particular channel, indicating that the new programming data is no different than the current programming of the channel, the control logic does not spawn a daughter programming cycle to that channel. If the control logic determines that a mismatch condition exists, the control logic updates the contents of the effected shadow register while spawning the daughter cycle to the distributed channel to be reprogrammed. By spawning only those daughter programming cycles necessary to actually reprogram the DMA system, the distributed DMA system of the present invention requires less bus traffic and thus is more efficient.

Abstract translation: 公开了一种实现分布式直接存储器访问架构的计算机系统。 计算机系统包括重映射引擎，其包括用于每个分布式DMA通道的控制逻辑和影子寄存器。 每个影子寄存器包括16字节的DMA配置信息，其反映了相关联的分布式DMA通道的当前编程。 当CPU需要编写一个或多个DMA通道时，CPU会向重新映射引擎中的控制逻辑发送一个DMA主编程周期。 重映射控制逻辑将主周期中的配置数据与影子寄存器的内容进行比较，并将子程序循环产生到仅存在不匹配条件的分布式通道。 如果相对于特定通道存在匹配，指示新编程数据与通道的当前编程没有不同，则控制逻辑不会向该通道产生子编程周期。 如果控制逻辑确定存在不匹配条件，则控制逻辑在产生子周期到分配频道以重新编程的同时更新受影响的寄存器的内容。 通过仅产生实际重新编程DMA系统所需的那些女儿编程周期，本发明的分布式DMA系统需要较少的总线流量，因此更有效。

公开(公告)号：US6122629A

公开(公告)日：2000-09-19

申请号：US70897

申请日：1998-04-30

Applicant: Bruce J. Walker ,  David B. Zafman ,  William W. Chow

Inventor： Bruce J. Walker ,  David B. Zafman ,  William W. Chow

IPC: G06F11/20 ,  G06F17/30

CPC classification number: G06F17/30067 ,  Y10S707/99938 ,  Y10S707/99952 ,  Y10S707/99953

Abstract: A system for protection of filesystem data integrity within a computer cluster is provided. The system uses redundant data caches at client and server nodes within the computer cluster. Caching of filesystem data is controlled so that non-shared files are preferably cached at client nodes. This increases filesystem performance within the computer cluster and ensures that failures may not result in a loss of modified filesystem data without a corresponding loss to the process(es) accessing that data. Shared files are cached at the server node and a backup cache node. This protects modified filesystem data against any single node failure.

Abstract translation: 提供了一种用于保护计算机集群内的文件系统数据完整性的系统。 系统在计算机集群内的客户端和服务器节点使用冗余数据高速缓存。 控制文件系统数据的缓存，使得非共享文件优选地在客户机节点处被缓存。 这会增加计算机集群内的文件系统性能，并确保失败可能不会导致修改后的文件系统数据丢失，而不会对访问该数据的进程造成相应的损失。 共享文件缓存在服务器节点和备份缓存节点。 这可以保护修改的文件系统数据免受任何单个节点故障的影响。