公开(公告)号：US09866187B2

公开(公告)日：2018-01-09

申请号：US14715879

申请日：2015-05-19

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Qi Yu Liu ,  Hong Wu Lin

IPC: H03F3/38 ,  H03F3/183 ,  H03F3/45 ,  H03F3/217

CPC classification number: H03F3/183 ,  H03F3/217 ,  H03F3/2171 ,  H03F3/2173 ,  H03F3/45475 ,  H03F2200/03 ,  H03F2203/45138

Abstract: A class-D amplifier includes a signal processing block. The signal processing block generates a first processed signal representing a difference between a first differential signal and a second differential signal, when a duty cycle of the first differential signal is greater than that of the second differential signal. The signal processing block generates the first processed signal representing a reference DC level, when the duty cycle of the first differential signal is less than that of the second differential signal. A second processed signal representing a difference between the second differential signal and the first differential signal is generated when the duty cycle of the second differential signal is greater than that of the first differential signal, and the second processed signal representing the reference DC level is generated when the duty cycle of the second differential signal is less than that of the first differential signal.

公开(公告)号：US09791883B2

公开(公告)日：2017-10-17

申请号：US15218605

申请日：2016-07-25

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Meng Wang ,  Xue Lian Zhou

IPC: G05F3/26 ,  H02M1/08 ,  H02M3/158 ,  H02M1/00

CPC classification number: G05F3/262 ,  H02M1/08 ,  H02M3/158 ,  H02M2001/0032 ,  Y02B70/16

Abstract: An electronic device disclosed herein includes a current comparator to generate an output current based upon a difference between a current flowing in an output branch and a current flowing in an input branch. A pair of transistors is coupled to an output of the current comparator. A first amplifier has inputs coupled to the pair of transistors and to a reference voltage, the first amplifier being configured to subtract the reference voltage from a voltage across the pair of transistors and output a difference voltage. A second amplifier has inputs coupled to the difference voltage and to the reference voltage, the second amplifier being configured to subtract the difference voltage from the reference voltage and output a pulse skipping mode reference signal.

公开(公告)号：US20170146571A1

公开(公告)日：2017-05-25

申请号：US14955207

申请日：2015-12-01

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Meng Wang ,  Xue Lian Zhou

IPC: G01R15/18

CPC classification number: G01R15/18 ,  G01R15/16 ,  G01R19/16538

Abstract: Current flowing through an inductor in response to a pulse width modulation (PWM) control signal is sensed to generate a sensed current. The sensed current is processed over one or more PWM cycles of the PWM control signal to generate an output signal indicative of average inductor current. This processing may include charging and discharging a capacitor at different rates dependent on the sense current, with the detection of capacitor discharge triggering a sampling of a voltage dependent on the sensed current that is indicative of average inductor current. The processing may include using the sensed to current to generate a first charge voltage associated with minimum inductor current and a second charge voltage associated with maximum inductor current, and then averaging the first and second charge voltages to generate an output signal indicative of average inductor current.

公开(公告)号：US09653990B1

公开(公告)日：2017-05-16

申请号：US14955116

申请日：2015-12-01

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Meng Wang ,  Xue Lian Zhou

IPC: H02M3/07

CPC classification number: H02M3/07 ,  H02M2003/071

Abstract: A charge pump circuit is coupled between a positive supply node and a ground node. The charge pump circuit operates in response to clock signals output from a clock generator to produce a negative voltage at a negative voltage output node. A soft-start circuit for the charge pump circuit includes a comparison circuit configured to compare a varying intermediate voltage sensed between a rising supply voltage and the negative voltage to a ramp voltage during a start-up period of the charge pump circuit. The clock generator is selectively enabled to generate the clock signals in response to the comparison to provide for pulse-skipping.

公开(公告)号：US20170102727A1

公开(公告)日：2017-04-13

申请号：US14887739

申请日：2015-10-20

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Yong Feng Liu

IPC: G05F3/26

CPC classification number: G05F3/267

Abstract: A Schmitt trigger circuit having an input coupled to a current summing junction. A trickle current source generates a trickle current applied to the current summing junction. A bandgap current source generates a bandgap current applied to the current summing junction (wherein the bandgap current is fixed when a supply voltage exceeds a threshold). A variable current source generates a variable current applied to the current summing junction (wherein the variable current varies dependent on the supply voltage). At the current summing junction, the variable current is offset against the trickle and bandgap currents with respect to generating a voltage that is sensed at the Schmitt trigger circuit input.

公开(公告)号：US09577579B2

公开(公告)日：2017-02-21

申请号：US15057552

申请日：2016-03-01

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Ru Feng Du ,  Qi Yu Liu

IPC: H03F1/02 ,  H03F3/217 ,  H03F3/21 ,  H03F3/185 ,  H03G3/34 ,  H04R3/00 ,  H03F1/30 ,  H03F3/183

CPC classification number: H03F1/3205 ,  H03F1/0205 ,  H03F1/305 ,  H03F3/183 ,  H03F3/185 ,  H03F3/187 ,  H03F3/211 ,  H03F3/2171 ,  H03F3/2173 ,  H03F3/45179 ,  H03F2200/03 ,  H03F2200/351 ,  H03F2203/21106 ,  H03F2203/45151 ,  H03F2203/45156 ,  H03G3/345 ,  H03G3/348 ,  H04R3/002

Abstract: A class D amplifier receives and amplifies a differential analog signal which is then differentially integrated. Two pulse width modulators generate pulse signals corresponding to the differentially integrated analog signal and two power units generate output pulse signals. The outputs the power units are coupled to input terminals of integrators via a resistor feedback network. An analog output unit converts the pulse signals to an output analog signal. The differential integration circuitry implements a soft transition between mute/un-mute. In mute, the integrator output is fixed. During the soft transition, the PWM outputs change slowly from a fixed 50% duty cycle to a final value to ensure that no pop noise is present in the output as a result of mode change.

Abstract translation: D类放大器接收并放大差分模拟信号，然后差分模拟信号被差分地积分。 两个脉冲宽度调制器产生对应于差分集成模拟信号的脉冲信号，两个功率单元产生输出脉冲信号。 功率单元的输出通过电阻反馈网络耦合到积分器的输入端。 模拟输出单元将脉冲信号转换为输出模拟信号。 差分积分电路实现静音/非静音之间的软转换。 静音时，积分器输出是固定的。 在软转换期间，PWM输出从固定的50％占空比缓慢变化到最终值，以确保由于模式更改导致输出中没有弹出噪声。

公开(公告)号：US20160334828A1

公开(公告)日：2016-11-17

申请号：US15218605

申请日：2016-07-25

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Meng Wang ,  Xue Lian Zhou

IPC: G05F3/26 ,  H02M1/08

CPC classification number: G05F3/262 ,  H02M1/08 ,  H02M3/158 ,  H02M2001/0032 ,  Y02B70/16

Abstract: An electronic device disclosed herein includes a current comparator to generate an output current based upon a difference between a current flowing in an output branch and a current flowing in an input branch. A pair of transistors is coupled to an output of the current comparator. A first amplifier has inputs coupled to the pair of transistors and to a reference voltage, the first amplifier being configured to subtract the reference voltage from a voltage across the pair of transistors and output a difference voltage. A second amplifier has inputs coupled to the difference voltage and to the reference voltage, the second amplifier being configured to subtract the difference voltage from the reference voltage and output a pulse skipping mode reference signal.

Abstract translation: 本文公开的电子设备包括电流比较器，用于基于在输出分支中流动的电流与在输入分支中流动的电流之间的差产生输出电流。 一对晶体管耦合到电流比较器的输出端。 第一放大器具有耦合到所述一对晶体管和参考电压的输入，所述第一放大器被配置为从所述一对晶体管上的电压中减去所述参考电压并输出差分电压。 第二放大器具有耦合到差分电压和参考电压的输入，第二放大器被配置为从参考电压中减去差分电压并输出脉冲跳跃模式参考信号。

公开(公告)号：US09490762B2

公开(公告)日：2016-11-08

申请号：US14681569

申请日：2015-04-08

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Yi Jun Duan

IPC: H03F3/45 ,  H02H9/04

CPC classification number: H03F3/45179 ,  H02H9/043 ,  H03F3/45071 ,  H03F3/45183 ,  H03F2200/471 ,  H03F2203/45022 ,  H03F2203/45526 ,  H03F2203/45674

Abstract: Described herein is an electronic device. The electronic device includes a unity gain buffer having an input coupled to an input node to receive an input voltage and an output coupled to an output node. A current sink circuit operates in a sleep mode in an absence of a sink current flowing into the output node, and operates in a sinking mode to sink the sink current from the output node to a reference supply node when the sink current flows into the output node.

Abstract translation: 这里描述的是电子设备。 电子设备包括单位增益缓冲器，其具有耦合到输入节点的输入以接收输入电压和耦合到输出节点的输出。 电流吸收电路在没有流入输出节点的吸收电流的情况下以睡眠模式工作，并且当吸收电流流入输出端时工作在吸收模式以将吸收电流从输出节点吸收到参考供应节点 节点。

公开(公告)号：US09461545B2

公开(公告)日：2016-10-04

申请号：US14493436

申请日：2014-09-23

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Hai Bo Zhang ,  Sanford Li

IPC: H02M3/158 ,  H02M1/36 ,  H03K17/04

CPC classification number: H02M3/1588 ,  H02M1/36 ,  H02M3/158 ,  H03K17/04 ,  H03K17/162 ,  H03K2217/0054 ,  Y02B70/1466

Abstract: A first softstart signal indicates operation in a load phase for a boost rectifier and a second softstart signal indicates operation in a pulse drive phase which follows the load phase. A rectification transistor is actuated for the duration of the load phase in response to the first softstart circuit to generate a rising output voltage. The rectification transistor is further repeatedly actuated during the pulse drive phase in response to the second softstart circuit to generate a boosted output voltage. A first transistor coupled between a first conduction terminal and a body terminal of the rectification transistor is actuated, and a second transistor coupled between the body terminal and a second conduction terminal of the rectification transistor is deactuated, during the load phase. The first transistor is deactuated, and the second transistor is actuated, during the pulse drive phase.

Abstract translation: 第一软启动信号指示用于升压整流器的负载阶段的操作，并且第二软启动信号指示在跟随负载阶段的脉冲驱动阶段中的操作。 响应于第一软启动电路，整流晶体管在负载阶段的持续时间内被致动以产生上升的输出电压。 响应于第二软启动电路，在脉冲驱动阶段期间，整流晶体管进一步被重新启动以产生升压的输出电压。 耦合在整流晶体管的第一导电端子和体电极端子之间的第一晶体管被致动，并且耦合在整流晶体管的主体端子和第二导通端子之间的第二晶体管在负载阶段期间被去激活。 在脉冲驱动阶段期间，第一晶体管被去激活，并且第二晶体管被致动。

公开(公告)号：US20160181988A1

公开(公告)日：2016-06-23

申请号：US15057552

申请日：2016-03-01

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Ru Feng Du ,  Qi Yu Liu

IPC: H03F1/02 ,  H03F3/217 ,  H03F3/21 ,  H03F3/185

CPC classification number: H03F1/3205 ,  H03F1/0205 ,  H03F1/305 ,  H03F3/183 ,  H03F3/185 ,  H03F3/187 ,  H03F3/211 ,  H03F3/2171 ,  H03F3/2173 ,  H03F3/45179 ,  H03F2200/03 ,  H03F2200/351 ,  H03F2203/21106 ,  H03F2203/45151 ,  H03F2203/45156 ,  H03G3/345 ,  H03G3/348 ,  H04R3/002

Abstract: A class D amplifier receives and amplifies a differential analog signal which is then differentially integrated. Two pulse width modulators generate pulse signals corresponding to the differentially integrated analog signal and two power units generate output pulse signals. The outputs the power units are coupled to input terminals of integrators via a resistor feedback network. An analog output unit converts the pulse signals to an output analog signal. The differential integration circuitry implements a soft transition between mute/un-mute. In mute, the integrator output is fixed. During the soft transition, the PWM outputs change slowly from a fixed 50% duty cycle to a final value to ensure that no pop noise is present in the output as a result of mode change.