公开(公告)号：US06281822B1

公开(公告)日：2001-08-28

申请号：US09322539

申请日：1999-05-28

申请人： Edwin C. Park

发明人： Edwin C. Park

IPC分类号： H03M166

CPC分类号： H03M7/3006 ,  G06F1/025 ,  H03M7/3031

摘要： A pulse density modulator generates output pulses that are optimized as to their even distribution over time. More particularly, the invention represents parallel or serial digital input signals as serial binary output signals, where the binary output pulses are evenly spaced over time to the greatest extent possible. The output signal includes a pattern that repeats during successive “cycles.” The number of pulses in each cycle varies in proportion to the magnitude of the digital input signal. When a digital input signal is provided to an accumulator, the accumulator repeatedly updates a current N-bit sum value by adding the digital input signal thereto. According to this computation, the accumulator either (1) provides a first prescribed signal on a carry output if the current sum cannot be expressed in N bits, or (2) provides a different prescribed signal on the carry output if the current sum can be expressed in N bits. The carry output provides a serial binary output having 2N bits in each cycle. The accumulator may be used as a digital-to-analog converter by routing the carry output to an analog filter. Alternatively, the digital output of the accumulator may be used to provide a trigger signal of repeating, evenly spaced pulses.

摘要翻译： 脉冲密度调制器产生针对其随时间均匀分布而优化的输出脉冲。 更具体地，本发明将并行或串行数字输入信号表示为串行二进制输出信号，其中二进制输出脉冲在最大程度上随时间均匀地间隔开。 输出信号包括在连续“循环”期间重复的图案。 每个周期中的脉冲数量与数字输入信号的幅度成比例地变化。 当向累加器提供数字输入信号时，累加器通过将数字输入信号相加来重复地更新当前的N位和值。 根据该计算，如果电流和不能以N位表示，则（1）在进位输出上提供第一规定信号，或者（2）如果电流和可以在进位输出上提供不同的规定信号 以N位表示。 进位输出在每个周期中提供具有2N位的串行二进制输出。 累加器可以通过将进位输出路由到模拟滤波器而用作数模转换器。 或者，累加器的数字输出可以用于提供重复均匀间隔的脉冲的触发信号。

公开(公告)号：US20010005174A1

公开(公告)日：2001-06-28

申请号：US09768674

申请日：2001-01-24

发明人： Erlend Olson ,  Ion Opris

IPC分类号： H03M003/00

CPC分类号： H03M7/3006 ,  H03F3/2173 ,  H03F2200/331 ,  H03M3/43 ,  H03M3/496 ,  H03M7/3031

摘要： A system and method of creating a highly efficient digital amplifier which can take either analog or digital inputs, and produce a high power accurate representation of the input to drive speakers or other low impedance load is described. The system employs a transition detector and delay unit which allows the comparator of the signal modulator to ignore its inputs for a pre-determined number of subsequent clock cycles once an output transition has been detected. Through the use of faster clocks and variable clock cycle skips upon the comparator's output transition, finer resolution of the feedback's clock period for noise-shaping purposes is achieved. Finer resolution of the clock period allows the present invention to employ a more aggressive noise-shaping than previously possible. In another aspect of the invention, additional delta-sigma modulator noise suppression is obtained by using the common bridge implementation of the power output stage with the improvement of configuring the bridge to create a 3-state condition instead of the conventional 2 states. By controlling the two halves of the bridge independently of one another, an output with 3 states makes for improved noise shaping performance.

摘要翻译： 描述了一种创建高效数字放大​​器的系统和方法，该数字放大器可以采用模拟或数字输入，并且产生用于驱动扬声器或其他低阻抗负载的输入的高功率精确表示。 一旦检测到输出转换，该系统采用转换检测器和延迟单元，其允许信号调制器的比较器忽略其输入以用于预定数量的后续时钟周期。 通过使用更快的时钟和可变时钟周期跳过比较器的输出转换，实现了用于噪声整形的反馈时钟周期的更好的分辨率。 时钟周期的更好的分辨率允许本发明采用比先前可能的更积极的噪声整形。 在本发明的另一方面，通过使用功率输出级的共同桥接实现，通过改进配置桥以创建3态条件而不是传统的2状态来获得附加的Δ-Σ调制器噪声抑制。 通过彼此独立地控制桥的两半，具有3个状态的输出改善了噪声整形性能。

公开(公告)号：US4812815A

公开(公告)日：1989-03-14

申请号：US923163

申请日：1986-10-24

申请人： Kazumitsu Miyakoshi ,  Mitsuyoshi Nakaya

发明人： Kazumitsu Miyakoshi ,  Mitsuyoshi Nakaya

IPC分类号： H03M1/00

CPC分类号： H03M3/346 ,  H03M3/50 ,  H03M7/3031 ,  H03M7/304

摘要： A D/A converter system for converting digital signal to analog signal includes a circuit for converting digital signal such as PCM signal to pulse density modulation signal, and an analog low-pass filter for converting the pulse density modulation signal to analog signal by removing noise from the pulse density modulation signal.

摘要翻译： 用于将数字信号转换为模拟信号的AD / A转换器系统包括用于将诸如PCM信号的数字信号转换为脉冲浓度调制信号的电路和用于通过去除噪声从而将脉冲密度调制信号转换为模拟信号的模拟低通滤波器 脉冲密度调制信号。

公开(公告)号：US4209773A

公开(公告)日：1980-06-24

申请号：US855784

申请日：1977-11-28

申请人： John D. Everard

发明人： John D. Everard

IPC分类号： H03M1/82 ,  G06F7/68 ,  H03M1/00 ,  H03M7/00 ,  H03K13/02

CPC分类号： H03M7/3028 ,  G06F7/68 ,  H03M7/3031

摘要： A digital-to-analogue converter which uses a technique of two-level quantization in order to generate a pulse density code signal which yields the analogue signal when filtered. Standard digital logic adders and registers are used in the conversion of PCM signals to the pulse density code. The adders and registers are arranged as a feedback loop in which an approximation signal capable of either a "high" or a "low" level is compared repetitively with a PCM signal and the difference is accumulated, but at the end of each operation the accumulated total is tested and the value of the approximation signal for the next cycle is chosen so as to reduce the accumulated total. The cycle period is set by a clock, and the approximation signal is the pulse density code signal. The noise spectrum of the pulse density code signal may be adjusted by the addition of an offset signal to the incoming PCM signal. The digital-to-analogue converter is suitable for use in converting linear PCM telephone speech signals into analogue signals.

摘要翻译： 一种数模转换器，其使用两电平量化技术，以产生当滤波时产生模拟信号的脉冲密度码信号。 标准数字逻辑加法器和寄存器用于将PCM信号转换为脉冲密度代码。 加法器和寄存器被布置为反馈回路，其中可以将具有“高”或“低”电平的近似信号与PCM信号重复地比较，并且积分该差，但是在每次操作结束时，累加 总计被测试，并且选择下一个周期的近似信号的值以便减少累积的总数。 周期由时钟设定，近似信号是脉冲密度码信号。 脉冲密度码信号的噪声频谱可以通过向输入PCM信号添加偏移信号来调节。 数模转换器适用于将线性PCM电话语音信号转换为模拟信号。

公开(公告)号：US07999711B1

公开(公告)日：2011-08-16

申请号：US12844862

申请日：2010-07-28

申请人： Runsheng He ,  Haoli Qian

发明人： Runsheng He ,  Haoli Qian

IPC分类号： H03M3/00

CPC分类号： H03M7/3031 ,  H03M7/3026 ,  H03M7/3042

摘要： A noise-shaping module including a first addition module configured to receive a digital input signal and a filtered output signal. A truncation module is configured to remove selected bits from the digital input signal and output a truncated output signal. The truncated output signal corresponds to the digital input signal with the selected bits removed. A second addition module is configured to output a difference signal. The difference signal is based on a difference between the digital input signal and the truncated output signal. A filter module is configured to generate the filtered output signal based on the difference signal and provide the filtered output signal to the first addition module.

摘要翻译： 噪声整形模块包括被配置为接收数字输入信号和滤波后的输出信号的第一加法模块。 截断模块被配置为从数字输入信号中去除所选择的位并输出截断的输出信号。 截断的输出信号对应于数字输入信号，其中所选择的位被去除。 第二加法模块被配置为输出差分信号。 差分信号基于数字输入信号和截断输出信号之间的差异。 滤波器模块被配置为基于差分信号产生经滤波的输出信号，并将经滤波的输出信号提供给第一加法模块。

公开(公告)号：US07817074B2

公开(公告)日：2010-10-19

申请号：US12279391

申请日：2007-02-09

申请人： Shinichi Harigae

发明人： Shinichi Harigae

IPC分类号： H03M3/00

CPC分类号： H03M7/3031 ,  H03M3/354 ,  H03M3/50 ,  H03M7/3026

摘要： A D/A converter (100) includes a delta-sigma modulation circuit (102) including a quantizer (105) that receives a digital signal to quantize it based on a quantization reference value, a local D/A conversion circuit (107) for converting an output from the delta-sigma modulating circuit to an analog signal to be outputted, and a control circuit (109) for correcting the quantization reference value of the quantizer. The quantization reference value is established for each of a plurality of discrete output values that the quantizer may output. The control circuit (109) corrects the quantization reference value to cancel any distortion that would occur in a circuit, following the delta-sigma modulation circuit (102) and including the local D/A conversion circuit (107).

摘要翻译： AD / A转换器（100）包括Δ-Σ调制电路（102），该Δ-Σ调制电路（102）包括量化器（105），该量化器（105）基于量化参考值接收数字信号以对其进行量化;本地D / A转换电路（107） 从Δ-Σ调制电路到要输出的模拟信号的输出;以及用于校正量化器的量化参考值的控制电路（109）。 针对量化器可以输出的多个离散输出值中的每一个建立量化参考值。 控制电路（109）校正量化参考值以抵消在Δ-Σ调制电路（102）之后并且包括本地D / A转换电路（107）的电路中将发生的任何失真。

公开(公告)号：US07436337B1

公开(公告)日：2008-10-14

申请号：US11636069

申请日：2006-12-08

申请人： Runsheng He ,  Haoli Qian

发明人： Runsheng He ,  Haoli Qian

IPC分类号： H03M3/00

CPC分类号： H03M7/3031 ,  H03M7/3026 ,  H03M7/3042

摘要： A noise shaping module comprises a first addition module that receives a digital input signal and generates an output signal. A truncation module generates a truncated output signal based on an output of said first addition module. A filter module generates a filtered output based on a combination of output signal of the first addition module and the truncated output signal of the first truncation module.

摘要翻译： 噪声整形模块包括接收数字输入信号并产生输出信号的第一加法模块。 截断模块基于所述第一加法模块的输出产生截断的输出信号。 滤波器模块基于第一加法模块的输出信号和第一截断模块的截断输出信号的组合来生成滤波输出。

公开(公告)号：US07283012B2

公开(公告)日：2007-10-16

申请号：US11107686

申请日：2005-04-15

申请人： Meoung-Jin Lim

发明人： Meoung-Jin Lim

IPC分类号： H03K7/06

CPC分类号： H03K7/08 ,  G06F1/022 ,  H03F3/217 ,  H03F2200/345 ,  H03M7/3024 ,  H03M7/3031

摘要： A tri-state pulse density modulator includes a first switch device coupled to a high voltage, and a second switch device coupled to a low voltage. An adder receives a pulse density modulation (PDM) input signal and a latched input signal to generate an output sum signal and a carry signal. A latch module coupled with the adder latches the output sum signal with a clock signal to generate the latched input signal. A control circuit module responsive to the carry signal for selectively turns off the first and second switch devices to generate the PDM output signal at a tri-state voltage between the first and second voltages, or turns on the first or second switch device to generate the PDM output signal at the first or second voltage, respectively. Thus, the PDM output signal only switches between the tri-state voltage and either the first voltage or the second voltage.

摘要翻译： 三态脉冲密度调制器包括耦合到高电压的第一开关器件和耦合到低电压的第二开关器件。 加法器接收脉冲密​​度调制（PDM）输入信号和锁存的输入信号，以产生输出和信号和进位信号。 与加法器耦合的锁存模块将输出和信号与时钟信号锁存以产生锁存的输入信号。 响应于进位信号的控制电路模块选择性地关闭第一和第二开关装置，以在第一和第二电压之间的三态电压下产生PDM输出信号，或者打开第一或第二开关装置以产生 PDM输出信号分别为第一或第二电压。 因此，PDM输出信号仅在三态电压和第一电压或第二电压之间切换。

公开(公告)号：US20070019744A1

公开(公告)日：2007-01-25

申请号：US10555716

申请日：2004-05-06

申请人： Guenter Spahlinger

发明人： Guenter Spahlinger

IPC分类号： H04B14/04

CPC分类号： H03M7/3017 ,  H03M7/3026 ,  H03M7/3031

摘要： A pulse modulator has a subtraction stage that produces a control error signal from the difference between a complex input signal and a feedback signal. A signal conversion stage converts the control error signal to a control signal. The control signal is multiplied by a complex mixing signal at the frequency ω0 in a first multiplication stage. At least one of the real and imaginary parts of the up-mixed control signal is then quantized by a quantization stage to produce a real pulsed signal. The pulsed signal is then employed to produce the feedback signal for the subtraction stage in a feedback unit. The pulse modulator according to the invention allows the range of reduced quantization noise to be shifted toward a desired operating frequency ω0.

摘要翻译： 脉冲调制器具有从复合输入信号和反馈信号之间的差产生控制误差信号的减法级。 信号转换级将控制误差信号转换成控制信号。 控制信号在第一乘法阶段乘以频率ω0 <0>的复混合信号。 然后，上变频控制信号的实部和虚部中的至少一个通过量化级进行量化，以产生实际的脉冲信号。 然后使用脉冲信号在反馈单元中产生用于减法级的反馈信号。 根据本发明的脉冲调制器允许减小的量化噪声的范围朝着期望的工作频率ω0 <0>移动。

公开(公告)号：US20060290549A1

公开(公告)日：2006-12-28

申请号：US11477149

申请日：2006-06-27

申请人： Rajiv Laroia ,  Tom Richardson ,  Frank Lane

发明人： Rajiv Laroia ,  Tom Richardson ,  Frank Lane

IPC分类号： H03M3/00

CPC分类号： H03F1/34 ,  H03F3/217 ,  H03M3/388 ,  H03M3/40 ,  H03M7/3006 ,  H03M7/3017 ,  H03M7/3028 ,  H03M7/3031 ,  H03M7/304

摘要： Methods and apparatus for implementing and/or using amplifiers and performing various amplification related operations are described. The methods are well suited for use with, but not limited to, switching type amplifiers. The methods and apparatus described herein allow for the use of switching amplifiers while reducing and/or compensating for distortions that the use of such amplifiers would normally create. The described methods and apparatus can be used alone or in combination with various novel signaling schemes which can make it easier to compensate for the non-ideal behavior of switching amplifiers in such a way as to enable practical application in wireless transmission and/or other applications.

摘要翻译： 描述了用于实现和/或使用放大器并执行各种放大相关操作的方法和装置。 这些方法非常适用于但不限于开关型放大器。 本文描述的方法和装置允许使用开关放大器，同时减少和/或补偿通常使用这种放大器的失真。 所描述的方法和装置可以单独使用或与各种新颖的信令方案组合使用，这可以使得更容易以这样的方式补偿开关放大器的非理想行为，使得无线传输和/或其他应用中的实际应用 。