公开(公告)号：US08153523B2

公开(公告)日：2012-04-10

申请号：US12362174

申请日：2009-01-29

Applicant: Ryan Chia-Jen Chen ,  Yi-Hsing Chen ,  Ching-Yu Chang

Inventor： Ryan Chia-Jen Chen ,  Yi-Hsing Chen ,  Ching-Yu Chang

IPC: H01L21/44

CPC classification number: H01L21/31111 ,  H01L21/31144 ,  H01L29/517

Abstract: A method of semiconductor fabrication including an etching process is provided. The method includes providing a substrate and forming a target layer on the substrate. An etchant layer is formed on the target layer. The etchant layer reacts with the target layer and etches a portion of the target layer. In an embodiment, an atomic layer of the target layer is etched. The etchant layer is then removed from the substrate. The process may be iterated any number of times to remove a desired amount of the target layer. In an embodiment, the method provides for decreased lateral etching. The etchant layer may provide for improved control in forming patterns in thin target layers such as, capping layers or high-k dielectric layers of a gate structure.

Abstract translation: 提供了包括蚀刻工艺的半导体制造方法。 该方法包括提供衬底并在衬底上形成目标层。 在目标层上形成蚀刻剂层。 蚀刻剂层与靶层反应并蚀刻目标层的一部分。 在一个实施例中，蚀刻目标层的原子层。 然后从衬底去除蚀刻剂层。 该过程可以迭代任何次数以去除期望量的目标层。 在一个实施例中，该方法提供减少的横向蚀刻。 蚀刻剂层可以提供在薄目标层中形成图案的改进控制，例如栅极结构的覆盖层或高k电介质层。

公开(公告)号：US08153350B2

公开(公告)日：2012-04-10

申请号：US12205509

申请日：2008-09-05

Applicant: Ching-Yu Chang ,  Chin-Hsiang Lin

Inventor： Ching-Yu Chang ,  Chin-Hsiang Lin

IPC: G03F7/26

CPC classification number: G03F7/40 ,  G03F7/405

Abstract: The present invention includes a lithography method comprising forming a first patterned resist layer including at least one opening therein over a substrate. A protective layer is formed on the first patterned resist layer and the substrate whereby a reaction occurs at the interface between the first patterned resist layer and the protective layer to form a reaction layer over the first patterned resist layer. The non-reacted protective layer is then removed. Thereafter, a second patterned resist layer is formed over the substrate, wherein at least one portion of the second patterned resist layer is disposed within the at least one opening of the first patterned resist layer. The substrate is thereafter etched using the first and second patterned resist layers as a mask.

Abstract translation: 本发明包括光刻方法，包括在衬底上形成包括至少一个开口的第一图案化抗蚀剂层。 在第一图案化抗蚀剂层和基板上形成保护层，由此在第一图案化抗蚀剂层和保护层之间的界面处发生反应，以在第一图案化抗蚀剂层上形成反应层。 然后除去未反应的保护层。 此后，在衬底上形成第二图案化抗蚀剂层，其中第二图案化抗蚀剂层的至少一部分设置在第一图案化抗蚀剂层的至少一个开口内。 然后使用第一和第二图案化抗蚀剂层作为掩模蚀刻衬底。

公开(公告)号：US08137895B2

公开(公告)日：2012-03-20

申请号：US11427721

申请日：2006-06-29

Applicant: Ching-Yu Chang

Inventor： Ching-Yu Chang

IPC: G03F7/11

CPC classification number: G03F7/091

Abstract: An anti-reflective coating comprises a plurality of main backbone chains, and at least one long free polymer chain coupled to at least one of the plurality of main backbone chains.

Abstract translation: 抗反射涂层包含多个主要主链，以及至少一个与多个主要主链中的至少一个连接的长自由聚合物链。

公开(公告)号：US20120028477A1

公开(公告)日：2012-02-02

申请号：US13268191

申请日：2011-10-07

Applicant: Tsung-Lin Lee ,  Clement Hsingjen Wann ,  Ching-Yu Chang

Inventor： Tsung-Lin Lee ,  Clement Hsingjen Wann ,  Ching-Yu Chang

IPC: H01L21/312

CPC classification number: H01L21/0337 ,  H01L21/31144 ,  H01L21/76816

Abstract: A method of fabricating a semiconductor device is provided which includes providing a substrate. A material layer is formed over the substrate. A polymer layer is formed over the material layer. A nano-sized feature is self-assembled using a portion of the polymer layer. The substrate is patterned using the nano-sized feature.

Abstract translation: 提供一种制造半导体器件的方法，其包括提供衬底。 材料层形成在衬底上。 聚合物层形成在材料层上。 使用聚合物层的一部分自组装纳米尺寸的特征。 使用纳米尺寸的特征对衬底进行图案化。

公开(公告)号：US20110229829A1

公开(公告)日：2011-09-22

申请号：US13111534

申请日：2011-05-19

Applicant: Ching-Yu Chang

Inventor： Ching-Yu Chang

IPC: G03F7/20

CPC classification number: G03F7/2041 ,  G03F7/0046

Abstract: An immersion lithography resist material comprising a matrix polymer having a first polarity and an additive having a second polarity that is substantially greater than the first polarity. The additive may have a molecular weight that is less than about 1000 Dalton. The immersion lithography resist material may have a contact angle that is substantially greater than the contact angle of the matrix polymer.

Abstract translation: 一种浸没式光刻抗蚀剂材料，包括具有第一极性的基质聚合物和具有基本上大于第一极性的第二极性的添加剂。 添加剂可以具有小于约1000道尔顿的分子量。 浸没式光刻抗蚀剂材料可具有基本上大于基质聚合物的接触角的接触角。

公开(公告)号：US07691559B2

公开(公告)日：2010-04-06

申请号：US11337986

申请日：2006-01-24

Applicant: Ching-Yu Chang ,  C. C. Ke ,  Vincent Yu

Inventor： Ching-Yu Chang ,  C. C. Ke ,  Vincent Yu

IPC: G03F7/00 ,  G03F7/004

CPC classification number: G03F7/2041 ,  G03F7/162 ,  G03F7/168 ,  G03F7/70341 ,  H01L21/67051 ,  H01L21/6708 ,  H01L21/6715

Abstract: A method of performing immersion lithography on a semiconductor wafer is provided. The method includes providing a layer of resist onto a surface of the semiconductor wafer. Next, an edge-bead removal process spins the wafer at a speed greater than 1000 revolutions per minute and dispenses solvent through a nozzle while the wafer is spinning. Then, the resist layer is exposed using an immersion lithography exposure system.

Abstract translation: 提供了在半导体晶片上进行浸渍光刻的方法。 该方法包括在半导体晶片的表面上提供一层抗蚀剂。 接下来，边缘珠去除过程以大于1000转/分钟的速度旋转晶片，并且在晶片旋转时通过喷嘴分配溶剂。 然后，使用浸没式光刻曝光系统曝光抗蚀剂层。

公开(公告)号：US20100075478A1

公开(公告)日：2010-03-25

申请号：US12564200

申请日：2009-09-22

Applicant: Ching-Yu Chang

Inventor： Ching-Yu Chang

IPC: H01L21/265

CPC classification number: H01L21/31133 ,  H01L21/26513 ,  H01L21/31111 ,  Y10S438/948 ,  Y10S438/949

Abstract: The present disclosure provides a method for making a semiconductor device. The method includes forming a sacrificial layer on a substrate; forming a patterned resist layer on the sacrificial layer; performing an ion implantation to the substrate; applying a first wet etch solution to remove the patterned photoresist layer; and applying a second wet etch solution to remove the sacrificial layer.

Abstract translation: 本公开提供了制造半导体器件的方法。 该方法包括在衬底上形成牺牲层; 在所述牺牲层上形成图案化的抗蚀剂层; 对衬底进行离子注入; 施加第一湿蚀刻溶液以除去图案化的光致抗蚀剂层; 以及施加第二湿蚀刻溶液以去除所述牺牲层。

公开(公告)号：US20100068884A1

公开(公告)日：2010-03-18

申请号：US12362174

申请日：2009-01-29

Applicant: Ryan Chia-Jen Chen ,  Yi-Hsing Chen ,  Ching-Yu Chang

Inventor： Ryan Chia-Jen Chen ,  Yi-Hsing Chen ,  Ching-Yu Chang

IPC: H01L21/311

CPC classification number: H01L21/31111 ,  H01L21/31144 ,  H01L29/517

Abstract: A method of semiconductor fabrication including an etching process is provided. The method includes providing a substrate and forming a target layer on the substrate. An etchant layer is formed on the target layer. The etchant layer reacts with the target layer and etches a portion of the target layer. In an embodiment, an atomic layer of the target layer is etched. The etchant layer is then removed from the substrate. The process may be iterated any number of times to remove a desired amount of the target layer. In an embodiment, the method provides for decreased lateral etching. The etchant layer may provide for improved control in forming patterns in thin target layers such as, capping layers or high-k dielectric layers of a gate structure.

Abstract translation: 提供了包括蚀刻工艺的半导体制造方法。 该方法包括提供衬底并在衬底上形成目标层。 在目标层上形成蚀刻剂层。 蚀刻剂层与靶层反应并蚀刻目标层的一部分。 在一个实施例中，蚀刻目标层的原子层。 然后从衬底去除蚀刻剂层。 该过程可以迭代任何次数以去除期望量的目标层。 在一个实施例中，该方法提供了减少的横向蚀刻。 蚀刻剂层可以提供在薄目标层中形成图案的改进控制，例如栅极结构的覆盖层或高k电介质层。

公开(公告)号：US07642184B2

公开(公告)日：2010-01-05

申请号：US11687093

申请日：2007-03-16

Applicant: Ching-Yu Chang ,  Jen-Chieh Shih

Inventor： Ching-Yu Chang ,  Jen-Chieh Shih

IPC: H01L21/4763

CPC classification number: H01L21/31144 ,  H01L21/76808

Abstract: The present disclosure provides a method of dual damascene processing. The method includes providing a substrate having vias formed therein; forming an under-layer in the vias and on the substrate; applying a solvent washing process to the under-layer; forming a silicon contained layer on the under-layer; patterning the silicon contained layer (SCL) to form SCL openings exposing the under-layer within the SCL openings; and etching the substrate and the under-layer within the SCL openings to form trenches.

Abstract translation: 本公开提供了一种双镶嵌加工的方法。 该方法包括提供其中形成有通孔的基板; 在通孔和基板上形成下层; 对底层进行溶剂洗涤处理; 在下层上形成含硅层; 图案化含硅层（SCL）以形成暴露SCL开口内的下层的SCL开口; 并在SCL开口内蚀刻衬底和底层以形成沟槽。

公开(公告)号：US07462248B2

公开(公告)日：2008-12-09

申请号：US11671570

申请日：2007-02-06

Applicant: Chih-Cheng Chiu ,  Ching-Yu Chang

Inventor： Chih-Cheng Chiu ,  Ching-Yu Chang

IPC: B08B3/04

CPC classification number: G03F1/82 ,  Y10S134/902

Abstract: A method for cleaning a photomask includes cleaning the photomask with a chemical cleaner, introducing a solution to the photomask, the solution is configured to react with residuals generated from the chemical cleaner to form insoluble precipitates, and rinsing the photomask with a fluid to remove the insoluble precipitates from the photomask.

Abstract translation: 用于清洁光掩模的方法包括用化学清洁剂清洁光掩模，将溶液引入到光掩模中，溶液被配置为与由化学清洁剂产生的残余物反应以形成不溶性沉淀物，并用流体冲洗光掩模以除去 来自光掩模的不溶性沉淀物。