公开(公告)号：US09728259B1

公开(公告)日：2017-08-08

申请号：US15070621

申请日：2016-03-15

Applicant: Qualcomm Technologies, Inc. ,  Industry-Academic Cooperation Foundation, Yonsei University

Inventor： Seong-Ook Jung ,  Byung Kyu Song ,  Taehui Na ,  Jung Pill Kim ,  Seung Hyuk Kang

IPC: G11C15/02 ,  G11C15/00 ,  G11C15/04 ,  G11C11/16

CPC classification number: G11C15/046 ,  G11C11/1673 ,  G11C15/02

Abstract: Non-volatile (NV)-content addressable memory (CAM) (NV-CAM) cells employing differential magnetic tunnel junction (MTJ) sensing for increased sense margin are disclosed. By the NV-CAM cells employing MTJ differential sensing, differential cell voltages can be generated for match and mismatch conditions in response to search operations. The differential cell voltages are amplified to provide a larger match line voltage differential for match and mismatch conditions, thus providing a larger sense margin between match and mismatch conditions. For example, a cross-coupled transistor sense amplifier employing positive feedback may be employed to amplify the differential cell voltages to provide a larger match line voltage differential for match and mismatch conditions. Providing NV-CAM cells that have a larger sense margin can mitigate sensing issues for increased search operation reliability. One non-limiting example of an NV-CAM cell that employs MTJ differential sensing is a ten (10) transistor (10T)-four (4) MTJ (10T-4MTJ) NV-TCAM cell.

公开(公告)号：US09652713B2

公开(公告)日：2017-05-16

申请号：US15090487

申请日：2016-04-04

Applicant: QUALCOMM TECHNOLOGIES INC.

Inventor： Jonathan James Hunt ,  Oleg Sinyavskiy ,  Robert Howard Kimball ,  Eric Martin Hall ,  Jeffrey Alexander Levin ,  Paul Bender ,  Michael-David Nakayoshi Canoy

IPC: G06F15/18 ,  G06N3/00 ,  G06N3/10 ,  G06N3/04

CPC classification number: G06N3/105 ,  G06N3/049

Abstract: Apparatus and methods for developing parallel networks. Parallel network design may comprise a general purpose language (GPC) code portion and a network description (ND) portion. GPL tools may be utilized in designing the network. The GPL tools may be configured to produce network specification language (NSL) engine adapted to generate hardware optimized machine executable code corresponding to the network description. The developer may be enabled to describe a parameter of the network. The GPC portion may be automatically updated consistent with the network parameter value. The GPC byte code may be introspected by the NSL engine to provide the underlying source code that may be automatically reinterpreted to produce the hardware optimized machine code. The optimized machine code may be executed in parallel.

公开(公告)号：US09608935B2

公开(公告)日：2017-03-28

申请号：US14479728

申请日：2014-09-08

Applicant: QUALCOMM Technologies Inc.

Inventor： Philippe Martin ,  Philippe Boucard

IPC: H04L12/933 ,  H04L12/805 ,  H04L12/865 ,  H04L12/863 ,  G06F15/78

CPC classification number: H04L49/109 ,  G06F15/7825 ,  H04L47/365 ,  H04L47/6275 ,  H04L47/628

Abstract: Systems and methods relate to a network on chip (NoC) which includes one or more channels configured to carry data packets in a first direction, the first direction having an upstream end and a downstream end. A tunnel is configured between an upstream element at the upstream end and a downstream element at the downstream end. The tunnel includes common wires which are shared by the one or more channels. The tunnel is configured to transmit data packets of two or more formats on the common wires based on common signals. common signals comprise data signals to transmit one or more of data, control, or debug information belonging to the data packets on the common wires, and framing signals to control transmission of the data signals on the common wires.

公开(公告)号：US09489706B2

公开(公告)日：2016-11-08

申请号：US13540476

申请日：2012-07-02

Applicant: Noam Levy ,  Guy Rapaport

Inventor： Noam Levy ,  Guy Rapaport

IPC: H04N5/355 ,  H04N5/232 ,  H04N5/235 ,  G06T1/20 ,  G06T5/50 ,  G06T5/00 ,  G06T7/00

CPC classification number: G06T1/20 ,  G06T5/007 ,  G06T5/50 ,  G06T7/35 ,  G06T2200/28 ,  G06T2207/20208 ,  H04N5/23267 ,  H04N5/2355 ,  H04N5/355

Abstract: Embodiments are directed towards enabling digital cameras to digitally process a captured a Low Dynamic Range image sequence at a real time video rate, and to convert the image sequence into an High Dynamic Range (HDR) image sequence using a pipelined architecture. Two or more image frames are captured using different exposure settings and then combined to form a single HDR output frame in a video sequence. The pipelined architecture operate on adjacent image frames by performing an image alignment, an image mixing, and a tone mapping on the adjacent image frames to generate the HDR image sequence.

Abstract translation: 实施例涉及使数字照相机以实时视频速率数字处理所捕获的低动态范围图像序列，并且使用流水线架构将图像序列转换为高动态范围（HDR）图像序列。 使用不同的曝光设置捕获两个或多个图像帧，然后组合以在视频序列中形成单个HDR输出帧。 流水线架构通过在相邻图像帧上执行图像对准，图像混合和色调映射来操作相邻图像帧，以生成HDR图像序列。

公开(公告)号：US09465749B2

公开(公告)日：2016-10-11

申请号：US13969559

申请日：2013-08-17

Applicant: QUALCOMM TECHNOLOGIES, INC.

Inventor： Laurent Moll ,  Jean-Jacques Lecler ,  Philippe Boucard

IPC: G06F12/02 ,  G06F12/10 ,  G06F12/08 ,  G06F17/50

CPC classification number: G06F12/1036 ,  G06F12/0207 ,  G06F12/0215 ,  G06F12/0811 ,  G06F12/1027 ,  G06F12/1081 ,  G06F17/5009 ,  G06F2212/681

Abstract: A system with a prefetch address generator coupled to a system translation look-aside buffer that comprises a translation cache. Prefetch requests are sent for page address translations for predicted future normal requests. Prefetch requests are filtered to only be issued for address translations that are unlikely to be in the translation cache. Pending prefetch requests are limited to a configurable or programmable number. Such a system is simulated from a hardware description language representation.

Abstract translation: 具有预取地址发生器的系统，其耦合到包括翻译高速缓存的系统转换后备缓冲器。 发送预取请求以进行页面地址转换，以便将来预测未来的正常请求。 预取请求被过滤，只能发布用于不太可能在翻译缓存中的地址转换。 待处理的预取请求仅限于可配置或可编程的数字。 这种系统是从硬件描述语言表示模拟的。

公开(公告)号：US09460387B2

公开(公告)日：2016-10-04

申请号：US13588774

申请日：2012-08-17

Applicant: Oleg Sinyavskiy ,  Eugene Izhikevich

Inventor： Oleg Sinyavskiy ,  Eugene Izhikevich

IPC: G06N3/10 ,  G06N3/04

CPC classification number: G06N3/10 ,  G06N3/049

Abstract: Event-based updates in artificial neuron networks may be implemented. An internal event may be defined in order to update incoming connections of a neuron. The internal event may be triggered by an external signal and/or internally by the neuron. A reinforcement signal may be used to trigger an internal event of a neuron in order to perform synaptic updates without necessitating post-synaptic response. An external event may be defined in order to deliver response of the neuron to desired targets. The external and internal events may be combined into a composite event configured to effectuate connection update and spike delivery to post-synaptic target. The scope of the internal event may comprise the respective neuron and does not extend to other neurons of the network. Conversely, the scope of the external event may extend to other neurons of the network via, for example, post-synaptic spike delivery.

Abstract translation: 可以实现人造神经网络中基于事件的更新。 可以定义内部事件以便更新神经元的传入连接。 内部事件可能由外部信号和/或内部由神经元触发。 加强信号可以用于触发神经元的内部事件，以便执行突触更新，而不需要突触后响应。 可以定义外部事件以便将神经元的响应递送到期望的目标。 外部和内部事件可以组合成组合事件，配置为实现连接更新和尖峰传递到突触后目标。 内部事件的范围可以包括相应的神经元，并且不延伸到网络的其他神经元。 相反，外部事件的范围可以通过例如突触后尖峰传递来延伸到网络的其他神经元。

公开(公告)号：US09379761B2

公开(公告)日：2016-06-28

申请号：US14758977

申请日：2013-01-11

Applicant: QUALCOMM Technologies, Inc.

Inventor： Peter Van Der Cammen

IPC: H04B17/00 ,  G01R27/02 ,  H04B1/40 ,  H04B1/00 ,  H04B15/02

CPC classification number: H04B1/40 ,  G01R27/02 ,  H04B1/0053 ,  H04B15/02 ,  H04B17/00

Abstract: An impedance measurement system (IMS) is provided that comprises an RSSI chain (RSSI), a limiter RSSI chain (LIMRSSI) and a limiter chain (LIM). The RSSI chain and the limiter RSSI chain are connected to a subtraction circuit (SC) and the limiter RSSI chain and the limiter chain are connected to a phase detector (PD). Further, a mobile communication device is provided that comprises the impedance measurement system in an adaptive impedance control system.

Abstract translation: 提供了包括RSSI链（RSSI），限幅器RSSI链（LIMRSSI）和限幅链（LIM）的阻抗测量系统（IMS）。 RSSI链和限幅器RSSI链连接到减法电路（SC），限幅器RSSI链和限幅器链连接到相位检测器（PD）。 此外，提供了一种包括自适应阻抗控制系统中的阻抗测量系统的移动通信设备。

公开(公告)号：US20160126934A1

公开(公告)日：2016-05-05

申请号：US14893581

申请日：2013-06-19

Applicant: QUALCOMM TECHNOLOGIES, INC.

Inventor： Maurice DE JONGH

IPC: H03J5/24 ,  H03H11/28 ,  H03H11/04

CPC classification number: H03J5/244 ,  H03H11/04 ,  H03H11/28 ,  H03J1/0008 ,  H03J5/246 ,  H03J2200/10

Abstract: An improved switchable capacitor array comprises a plurality of n≧2 capacitor units, each comprising a capacitor with a capacitance and a switch unit. The capacitor units are electrically connected in series. Equidistantly spaced impedance values can be obtained if the values of the capacitances are chosen properly.

Abstract translation: 改进的可切换电容器阵列包括多个n≥2个电容器单元，每个包括具有电容的电容器和开关单元。 电容器单元串联电连接。 如果正确选择电容值，则可以获得等距离的阻抗值。

公开(公告)号：US09288464B2

公开(公告)日：2016-03-15

申请号：US14462330

申请日：2014-08-18

Applicant: QUALCOMM Technologies, Inc.

Inventor： Christophe Bernard ,  Vincent Varoquaux ,  Marc De Vulpillieres

IPC: H04N9/64 ,  H04N11/20 ,  H04N7/01 ,  H04N11/24 ,  G06T3/40

CPC classification number: H04N11/20 ,  G06T3/4007 ,  H04N7/0125 ,  H04N9/646 ,  H04N11/002

Abstract: The present invention relates to a method for scaling a first channel, wherein the method comprises computing a low resolution second channel based on a transformation of the second channel with a transformation function used to transform high resolution channel into a low resolution channel; computing a correlation function between the low resolution second channel and the first channel; determining a predicted second channel having the high resolution from the low resolution second channel according to a prediction method; computing an high-pass second channel based on the difference between the second channel and the predicted second channel and based on the correlation function; determining a predicted first channel having the high resolution from the first channel according to the prediction method.

Abstract translation: 本发明涉及一种用于缩放第一信道的方法，其中该方法包括：基于第二信道的变换，使用用于将高分辨率信道转换成低分辨率信道的变换函数来计算低分辨率第二信道; 计算低分辨率第二通道和第一通道之间的相关函数; 根据预测方法从低分辨率第二信道确定具有高分辨率的预测第二信道; 基于所述第二信道和所述预测的第二信道之间的差异，并且基于所述相关函数来计算高通第二信道; 根据预测方法，从第一信道确定具有高分辨率的预测第一信道。

公开(公告)号：US09275464B2

公开(公告)日：2016-03-01

申请号：US14341699

申请日：2014-07-25

Applicant: Qualcomm Technologies, Inc.

Inventor： Noam Levy

IPC: H04N5/228 ,  G06T7/00 ,  H04N5/14 ,  H04N5/222 ,  H04N5/232 ,  G06T5/00

CPC classification number: G06T7/0079 ,  G06T5/002 ,  G06T7/11 ,  G06T7/136 ,  G06T7/162 ,  G06T7/174 ,  G06T7/194 ,  G06T2207/10016 ,  G06T2207/10148 ,  G06T2207/20021 ,  G06T2207/20036 ,  G06T2207/20072 ,  H04N5/14 ,  H04N5/2226 ,  H04N5/23206 ,  H04N5/23212 ,  H04N5/23229 ,  H04N5/23254

Abstract: Embodiments are directed towards determining within a digital camera whether a pixel belongs to a foreground or background segment within a given image by evaluating a ratio of derivative and deviation metrics in an area around each pixel in the image, or ratios of derivative metrics across a plurality of images. For each pixel within the image, a block of pixels are examined to determine an aggregate relative derivative (ARD) in the block. The ARD is compared to a threshold value to determine whether the pixel is to be assigned in the foreground segment or the background segment. In one embodiment, a single image is used to determine the ARD and the pixel segmentation for that image. Multiple images may also be used to obtain ratios of a numerator of the ARD, useable to determine an extent of the foreground.

Abstract translation: 实施例涉及在数字照相机内确定像素是否属于给定图像内的前景或背景段，通过评估图像中每个像素附近的区域中的导数和偏差度量的比率，或多个衍生度量的比率 的图像。 对于图像中的每个像素，检查像素块以确定块中的聚集相对导数（ARD）。 将ARD与阈值进行比较，以确定是否要在前景段或背景段中分配像素。 在一个实施例中，使用单个图像来确定该图像的ARD和像素分割。 也可以使用多个图像来获得可用于确定前景范围的ARD分子的比例。