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公开(公告)号：US11335678B2
公开(公告)日：2022-05-17
申请号：US16801038
申请日：2020-02-25
Applicant: STMICROELECTRONICS (TOURS) SAS
Inventor： Mohamed Boufnichel
Abstract: The present disclosure concerns an integrated circuit comprising a substrate, the substrate comprising a first region having a first thickness and a second region having a second thickness smaller than the first thickness, the circuit comprising a three-dimensional capacitor formed inside and on top of the first region, and at least first and second connection terminals formed on the second region, the first and second connection terminals being respectively connected to first and second electrodes of the three-dimensional capacitor.
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公开(公告)号：US20220123155A1
公开(公告)日：2022-04-21
申请号：US17566435
申请日：2021-12-30
Applicant: STMICROELECTRONICS (TOURS) SAS
Inventor： Frederic LANOIS
IPC: H01L29/861 , H01L29/10 , H01L29/417 , H01L29/66 , H01L29/78
Abstract: The present disclosure relates to a structure comprising, in a trench of a substrate, a first conductive region separated from the substrate by a first distance shorter than approximately 10 nm; and a second conductive region extending deeper than the first region.
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公开(公告)号：US11296071B2
公开(公告)日：2022-04-05
申请号：US16834499
申请日：2020-03-30
Applicant: STMicroelectronics (Tours) SAS
Inventor： Eric Laconde , Olivier Ory
Abstract: A device of protection against electrostatic discharges is formed in a semiconductor substrate of a first conductivity type that is coated with a semiconductor layer of a second conductivity type. A buried region of the second conductivity type is positioned at an interface between the semiconductor substrate and the semiconductor layer. First and second wells of the first conductivity type are formed in the semiconductor layer and a region of the second conductivity type is formed in the second well. A stop channel region of the second conductivity type is provided in the semiconductor layer to laterally separating the first well from the second well, where no contact is present between this stop channel region and either of the first and second wells.
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公开(公告)号：US11283153B2
公开(公告)日：2022-03-22
申请号：US16530493
申请日：2019-08-02
Applicant: STMICROELECTRONICS (TOURS) SAS
Inventor： Benoit Bonnet
Abstract: The invention relates to an antenna comprising: an elongate conducting band; an antenna socket; a connection to earth; at least one first capacitive element of adjustable capacitance; and at least one first inductive element in series with the first capacitive element.
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公开(公告)号：US20210280698A1
公开(公告)日：2021-09-09
申请号：US17188826
申请日：2021-03-01
Applicant: STMicroelectronics (Tours) SAS
Inventor： Patrick HAUTTECOEUR , Vincent CARO
IPC: H01L29/747 , H01L29/66 , H01L29/06
Abstract: A device includes a semiconductor substrate. A step is formed at a periphery of the semiconductor substrate. A first layer, made of polysilicon doped in oxygen, is deposited on top of and in contact with a first surface of the substrate. This first layer extends at least on a wall and bottom of the step. A second layer, made of glass, is deposited on top of the first layer and the edges of the first layer. The second layer forms a boss between the step and a central area of the device.
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Patent Agency Ranking
公开(公告)号：US11056744B2
公开(公告)日：2021-07-06
申请号：US16692367
申请日：2019-11-22
Applicant: STMicroelectronics (Tours) SAS
Inventor： Julien Ladroue , Mohamed Boufnichel
IPC: H01M50/172 , H01M50/103 , H01M50/116 , H01M50/124 , H01M50/502 , H01M50/543 , H01M50/555 , H01M10/058 , H01M10/04 , H01M10/0525
Abstract: A battery structure has structure anode and cathode contacts on a front face and on a rear face. The battery structure includes a battery having battery anode and cathode contacts only on a front face thereof. A film including a conductive layer and an insulating layer jackets the battery. The conductive layer extends over the battery anode and cathode contacts and is interrupted therebetween. Openings are provided in the insulating layer on the front and rear faces of the battery structure to form the structure anode and cathode contacts of the battery structure.
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公开(公告)号：US20210175203A1
公开(公告)日：2021-06-10
申请号：US17110063
申请日：2020-12-02
Applicant: STMicroelectronics (Tours) SAS
Inventor： Ludovic FALLOURD , Christophe SERRE
Abstract: A method for manufacturing electronic chips includes forming, on a side of an upper face of a semiconductor substrate, in and on which a plurality of integrated circuits has been formed, trenches laterally separating the integrated circuits. At least one metal connection pillar per integrated circuit is deposited on the side of the upper face of the substrate, and a protective resin extends in the trenches and on an upper face of the integrated circuits. The method further includes forming, from an upper face of the protective resin, openings located across from the trenches and extending over a width greater than or equal to that of the trenches, so as to clear a flank of at least one metal pillar of each integrated circuit. The integrated circuits are separated into individual chips by cutting.
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公开(公告)号：US10911092B2
公开(公告)日：2021-02-02
申请号：US16677422
申请日：2019-11-07
Inventor： Songfeng Zhao , Jean Pierre Proot
Abstract: A digital-to-analog converter (DAC) and a method for operating the DAC are disclosed. The DAC receives, over a first channel, a control signal that is transmitted in accordance with a binary protocol. The DAC also receives, over a second channel different than the first channel, data that is transmitted in accordance with a multilevel communication protocol that is different than the binary protocol. The DAC determines a plurality of first and second voltages based on the received data and identifies, based on the control signal, a time when data transmission or reception is switched between first and second antennas. In response to identifying, based on the control signal, the time when data transmission or reception is switched, the DAC outputs the determined plurality of first voltages to a first antenna tuning circuit or the determined plurality of second voltages to a second antenna tuning circuit.
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公开(公告)号：US20200321329A1
公开(公告)日：2020-10-08
申请号：US16834499
申请日：2020-03-30
Applicant: STMicroelectronics (Tours) SAS
Inventor： Eric LACONDE , Olivier ORY
Abstract: A device of protection against electrostatic discharges is formed in a semiconductor substrate of a first conductivity type that is coated with a semiconductor layer of a second conductivity type. A buried region of the second conductivity type is positioned at an interface between the semiconductor substrate and the semiconductor layer. First and second wells of the first conductivity type are formed in the semiconductor layer and a region of the second conductivity type is formed in the second well. A stop channel region of the second conductivity type is provided in the semiconductor layer to laterally separating the first well from the second well, where no contact is present between this stop channel region and either of the first and second wells.
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公开(公告)号：US10707337B2
公开(公告)日：2020-07-07
申请号：US16052378
申请日：2018-08-01
Applicant: STMicroelectronics (Tours) SAS
Inventor： Samuel Menard
IPC: H01L29/74 , H01L29/66 , H01L29/423 , H01L29/06 , H01L29/747 , H01L29/08
Abstract: A one-way switch has a gate referenced to a main back side electrode. An N-type substrate includes a P-type anode layer covering a back side and a surrounding P-type wall. First and second P-type wells are formed on the front side of the N-type substrate. An N-type cathode region is located in the first P-type well. An N-type gate region is located in the second P-type well. A gate metallization covers both the N-type gate region and a portion of the second P-type well. The second P-type well is separated from the P-type wall by the N-type substrate except at a location of a P-type strip that is formed in the N-type substrate and connects a portion on one side of the second P-type well to an upper portion of said P-type wall.
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