公开(公告)号：US20230087112A1

公开(公告)日：2023-03-23

申请号：US17939842

申请日：2022-09-07

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Filippo GIANNAZZO ,  Giuseppe Greco ,  Fabrizio ROCCAFORTE ,  Simone RASCUNA'

IPC: H01L29/66 ,  H01L29/16 ,  H01L29/45 ,  H01L29/868 ,  H01L29/872 ,  H01L21/04

Abstract: Merged-PiN-Schottky, MPS, device comprising: a solid body having a first electrical conductivity; an implanted region extending into the solid body facing a front side of the solid body, having a second electrical conductivity opposite to the first electrical conductivity; and a semiconductor layer extending on the front side, of a material which is a transition metal dichalcogenide, TMD. A first region of the semiconductor layer has the second electrical conductivity and extends in electrical contact with the implanted region, and a second region of the semiconductor layer has the first electrical conductivity and extends adjacent to the first region and in electrical contact with a respective surface portion of the front side having the first electrical conductivity.

公开(公告)号：US11610880B2

公开(公告)日：2023-03-21

申请号：US17182773

申请日：2021-02-23

Applicant: STMicroelectronics S.r.l.

Inventor： Davide Giuseppe Patti

IPC: H01L27/02 ,  H01L29/10 ,  H01L29/78 ,  H01L29/417 ,  H01L29/66

Abstract: Power MOS device, in which a power MOS transistor has a drain terminal that is coupled to a power supply node, a gate terminal that is coupled to a drive node and a source terminal that is coupled to a load node. A detection MOS transistor has a drain terminal that is coupled to a detection node, a gate terminal that is coupled to the drive node and a source terminal that is coupled to the load node. A detection resistor has a first terminal coupled to the power supply node and a second terminal coupled to the detection node.

公开(公告)号：US11610849B2

公开(公告)日：2023-03-21

申请号：US17108187

申请日：2020-12-01

Applicant: STMicroelectronics S.r.l.

Inventor： Paolo Crema

IPC: H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/495

Abstract: A leadframe has a die pad area and an outer layer of a first metal having a first oxidation potential. The leadframe is placed in contact with a solution containing a second metal having a second oxidation potential, the second oxidation potential being more negative than the first oxidation potential. Radiation energy is then applied to the die pad area of the leadframe contacted with the solution to cause a local increase in temperature of the leadframe. As a result of the temperature increase, a layer of said second metal is selectively provided at the die pad area of the leadframe by a galvanic displacement reaction. An oxidation of the outer layer of the leadframe is then performed to provide an enhancing layer which counters device package delamination.

公开(公告)号：US11609851B2

公开(公告)日：2023-03-21

申请号：US17229161

申请日：2021-04-13

Applicant: STMicroelectronics (Rousset) SAS ,  STMicroelectronics S.r.l.

Inventor： Laurent Folliot ,  Emanuele Plebani ,  Mirko Falchetto

IPC: G06F12/06 ,  G06N3/04

Abstract: According to one aspect, a method for determining, for a memory allocation, placements in a memory area of data blocks generated by a neural network, comprises a development of an initial sequence of placements of blocks, each placement being selected from several possible placements, the initial sequence being defined as a candidate sequence, a development of at least one modified sequence of placements from a replacement of a given placement of the initial sequence by a memorized unselected placement, and, if the planned size of the memory area obtained by this modified sequence is less than that of the memory area of the candidate sequence, then this modified sequence becomes the candidate sequence, the placements of the blocks for the allocation being those of the placement sequence defined as a candidate sequence once each modified sequence has been developed.

公开(公告)号：US20230081414A1

公开(公告)日：2023-03-16

申请号：US17894548

申请日：2022-08-24

Applicant: STMicroelectronics S.r.l.

Inventor： Alessandro FRANCESCHIN ,  Andrea MAZZANTI ,  Andrea PALLOTTA

IPC: H03B5/12

Abstract: A voltage controlled oscillator includes a series resonant circuit having a resonance frequency and an active voltage driving device coupled to the series resonant circuit. The active voltage driving device provides a driving voltage and has an output negative resistance in an operative voltage range at the resonance frequency. The active voltage driving device includes a cross-coupled differential pair having voltage supply terminals providing the driving voltage. The series resonant circuit is coupled between the voltage supply terminals of the cross-coupled differential pair.

公开(公告)号：US20230080594A1

公开(公告)日：2023-03-16

申请号：US17933016

申请日：2022-09-16

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Michele CALABRETTA ,  Crocifisso Marco Antonio RENNA ,  Sebastiano RUSSO ,  Marco Alfio TORRISI

IPC: H01L23/00 ,  B23K35/26 ,  C22C13/00 ,  H01L23/31 ,  H01L23/495

Abstract: A method for soldering a die obtained using the semiconductor technique with a leadframe, comprising the steps of providing a leadframe, which has at least one surface made at least partially of copper; providing a die, which has at least one surface coated with a metal layer; applying to the surface a solder alloy comprising at least 40 wt % of tin or at least 50% of indium or at least 50% of gallium, without lead, and heating the alloy to a temperature of at least 380° C. to form a drop of solder alloy; providing a die, which has at least one surface coated with a metal layer; and setting the metal layer in contact with the drop of solder alloy to form the soldered connection with the leadframe. Moreover, a device obtained with said method is provided.

公开(公告)号：US20230071636A1

公开(公告)日：2023-03-09

申请号：US17720156

申请日：2022-04-13

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Stefano Paolo RIVOLTA ,  Roberto MURA ,  Michele FERRAINA

IPC: A61B5/11 ,  A61B5/00

Abstract: The present disclosure is directed to a device with enhanced human activity recognition. The device detects a human activity using one more motion sensors, and enhances the detected human activity depending on whether the device is in an indoor environment or an outdoor environment. The device utilizes one or more electrostatic charge sensors to determine whether the device is in an indoor environment or an outdoor environment. The device may also exclude gyroscope data when performing human activity recognition, and instead utilize electrostatic charge variation data in conjunction with acceleration data to perform human activity recognition.

公开(公告)号：US11598920B2

公开(公告)日：2023-03-07

申请号：US17326955

申请日：2021-05-21

Applicant: STMicroelectronics S.r.l.

Inventor： Luca Maggi ,  Mark Andrew Shaw

IPC: G02B6/32 ,  G02F1/01 ,  G02B6/028 ,  G01L9/00

Abstract: An embodiment apparatus comprises an optically transparent substrate having first and second surfaces; a piezoelectric membrane, arranged at the first surface, that oscillates in response to a light beam propagated through the substrate; at least one reflective facet facing the substrate and arranged at the piezoelectric membrane; and an optical element receiving the light beam at an input end and guiding the light beam towards an output end coupled to the second surface. The optical element incorporates a light focusing path focusing the light beam at a focal point at the piezoelectric membrane, and at least one light collimating path collimating the light beam onto the at least one reflective facet. The optical element guides light reflected from the at least one reflective facet to the input end, the reflected light indicating a position of the optical element with respect to the focal point.

公开(公告)号：US20230064438A1

公开(公告)日：2023-03-02

申请号：US17460657

申请日：2021-08-30

Applicant: STMicroelectronics S.r.l.

Inventor： Alessandro CANNONE ,  Enrico FERRARA ,  Nicola ERRICO ,  Gea DONZELLI

IPC: H01L21/66 ,  G01R31/28

Abstract: Disclosed herein is a single integrated circuit chip including main logic that operates a vehicle component such as a valve driver. Isolated from the main logic within the chip is a safety area that operates to verify proper operation of the main logic. A checker circuit within the chip outside of the safety area serves to verify proper operation of the checker circuit. The checker circuit receives signals from the safety circuit and uses combinatorial logic circuit to verify from those signals that the check circuit is operating properly.

公开(公告)号：US20230062980A1

公开(公告)日：2023-03-02

申请号：US17821711

申请日：2022-08-23

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Delfo Nunziato SANFILIPPO ,  Piero FALLICA

IPC: H01L31/107 ,  H01L31/0352 ,  H01L31/18 ,  G01S7/4863

Abstract: The present disclosure is directed to an opto-electronic device of semiconductor material formed in a semiconductor layer of a first conductivity type having a thickness and accommodating at least one deep region of a second conductivity type. The deep region forms a PN junction with the semiconductor layer. The deep region has a depth greater than the width. The deep region is formed by a bottom portion contiguous to a first layer portion of the semiconductor layer; a surface portion contiguous to a second layer portion of the semiconductor layer; and an intermediate portion contiguous to a third layer portion. The concentration of the third layer portion is greater than that of the first and second layer portions.