公开(公告)号：US20180181683A1

公开(公告)日：2018-06-28

申请号：US15387958

申请日：2016-12-22

Applicant: Mellanox Technologies, Ltd.

Inventor： Roy ARMONI ,  Or DAVIDI

IPC: G06F17/50

CPC classification number: G06F17/505 ,  G06F17/5022

Abstract: A method, computer program, and apparatus are described for finding the logical equivalence between register transfer level (RTL) wires and post synthesis nets in a netlist. In some example embodiments, the method includes minimizing nets in a netlist and matching each RTL wire to a netlist net. In some example embodiments, the method also includes determining if an RTL wire is logically equivalent to a netlist net. In some example embodiments, the method also includes determining a new candidate for a net if the RTL wire and associated netlist net are not logically equivalent.

公开(公告)号：US10009278B2

公开(公告)日：2018-06-26

申请号：US14616760

申请日：2015-02-09

Applicant: Mellanox Technologies Ltd.

Inventor： Ori Rottenstreich ,  Dror Goldenberg

IPC: G06F15/173 ,  H04L12/801 ,  H04L12/24

CPC classification number: H04L47/12 ,  H04L41/12 ,  H04L41/16 ,  H04L41/5054

Abstract: A method for designing a Network Function Virtualization (NFV) architecture includes accepting a definition of multiple Virtual Network Functions (VNFs), and of one or more packet types having respective occurrence probabilities, wherein each packet type is associated with a respective subset of the VNFs that are to be applied to packets of that packet type. Information on multiple available physical computers, each capable of running only a partial subset of the multiple VNFs, is further accepted. The VNFs are allocated to the physical computers by applying an optimality criterion to definition and the information.

公开(公告)号：US09935048B2

公开(公告)日：2018-04-03

申请号：US15402247

申请日：2017-01-10

Applicant: Mellanox Technologies Ltd.

Inventor： Yossi Smeloy ,  Eyal Frost

IPC: H01L23/522 ,  H01L49/02

CPC classification number: H01L23/5227 ,  H01L28/10 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An inductive device is formed in a circuit structure that includes alternating conductive and insulating layers. The device includes, in a plurality of the conductive layers, traces forming a respective pair of interleaved loops and at least one interconnect segment in each of the plurality of the conductive layers. In each layer among the plurality of the conductive layers, at least one loop in the respective pair is closed by jumpers to an interconnect segment formed in another layer above or below the layer.

公开(公告)号：US20180011248A1

公开(公告)日：2018-01-11

申请号：US15633799

申请日：2017-06-27

Applicant: Mellanox Technologies, Ltd.

Inventor： Ido Bourstein ,  Sylvie Rockman

IPC: G02B6/122 ,  H01S5/042 ,  G02B6/42 ,  H01S5/022 ,  H01S5/024 ,  H01S5/40 ,  G02B6/12

CPC classification number: G02B6/122 ,  G02B6/428 ,  G02B2006/12061 ,  H01S5/0224 ,  H01S5/02252 ,  H01S5/02272 ,  H01S5/0228 ,  H01S5/02469 ,  H01S5/0425 ,  H01S5/4025

Abstract: An optoelectronic device includes an optoelectronic die, a laser die, and electrical interconnects. The optoelectronic device has a surface. A trench having first and second walls and a floor is formed in the surface, and an electrically conductive layer extends from the floor, via the first wall, to the surface. The laser die includes first and second electrodes and a laser output aperture. The laser die is mounted in the trench and is configured to emit a laser beam. The first electrode is coupled to the electrically conductive layer and the laser output aperture is mechanically aligned with a waveguide that extends from the second wall. The interconnects are formed on the second electrode of the laser die and on selected locations on the surface of the optoelectronic die. The interconnects are coupled to a substrate, and are configured to conduct electrical signals between the optoelectronic die and the substrate.

公开(公告)号：US20170371114A1

公开(公告)日：2017-12-28

申请号：US15195538

申请日：2016-06-28

Applicant: Mellanox Technologies, Ltd.

Inventor： Elad Mentovich ,  Itshak Kalifa ,  Sylvie Rockman ,  Alon Webman ,  Amir Prescher ,  Evelyn Landman ,  Anna Sandomirsky ,  Eitan Zahavi ,  Yaakov Gridish

IPC: G02B6/42 ,  G02B6/32 ,  G02B6/43

CPC classification number: G02B6/4243 ,  G02B6/32 ,  G02B6/4206 ,  G02B6/4214 ,  G02B6/423 ,  G02B6/4246 ,  G02B6/43

Abstract: An opto-mechanical coupler and corresponding method are provided. The coupler may include a first end and a second end configured to receive optical fibers and a top surface and bottomed surface defining a through hole extending between the top and bottom surfaces. The coupler may include a reflective surface that redirects the optical signals between a first direction and a second direction substantially perpendicular to the first direction. The coupler may position one or more optical fibers along a second direction such that an optical signal from the plurality of optoelectronic transceivers is directed into one or more optical fibers or an optical signal from the one or more optical fibers is directed into a plurality of the optoelectronic transceivers, with the coupler accommodating different diameters of optical fiber including POF, SMF, and/or MMF fiber.

公开(公告)号：US09807024B2

公开(公告)日：2017-10-31

申请号：US14730257

申请日：2015-06-04

Applicant: Mellanox Technologies Ltd.

Inventor： Alexander Shpiner ,  Eitan Zahavi

IPC: H04L12/823 ,  H04L12/803 ,  H04L12/825 ,  H04L12/841 ,  H04L12/26

CPC classification number: H04L47/32 ,  H04L43/0894 ,  H04L47/122 ,  H04L47/263 ,  H04L47/28 ,  Y02D50/10

Abstract: A method for communication includes transmitting data packets from a communication device to a network. Upon receiving in the communication device a congestion notification from the network, a rate of transmission of the data packets from the communication device to the network is reduced. While transmitting the data packets, after reducing the rate of transmission, the rate of transmission is increased incrementally when a predefined volume of data has been transmitted since having made a previous change in the rate of transmission.

公开(公告)号：US20170255559A1

公开(公告)日：2017-09-07

申请号：US15058262

申请日：2016-03-02

Applicant: Mellanox Technologies Ltd.

Inventor： Idan Burstein ,  Diego Crupnicoff ,  Shlomo Raikin ,  Michael Kagan

IPC: G06F12/08 ,  G06F13/28 ,  G06F12/12 ,  G06F13/42 ,  G06F3/06 ,  G06F15/173

Abstract: A memory device includes a target memory, having a memory address space, and a volatile buffer memory, which is coupled to receive data written over a bus to the memory device for storage in specified addresses within the memory address space. A memory controller is configured to receive, via the bus, a flush instruction and, in response to the flush instruction, to immediately flush the data held in the buffer memory with specified addresses within the memory address space to the target memory.

公开(公告)号：US20170255501A1

公开(公告)日：2017-09-07

申请号：US15446004

申请日：2017-03-01

Applicant: Mellanox Technologies, Ltd.

Inventor： Shahaf Shuler ,  Noam Bloch ,  Gil Bloch

IPC: G06F9/54

Abstract: An MPI collective operation carried out in a fabric of network elements by transmitting MPI messages from all the initiator processes in an initiator node to designated ones of the responder processes in respective responder nodes. Respective payloads of the MPI messages are combined in a network interface device of the initiator node to form an aggregated MPI message. The aggregated MPI message is transmitted through the fabric to network interface devices of responder nodes, disaggregating the aggregated MPI message into individual messages, and distributing the individual messages to the designated responder node processes.

公开(公告)号：US20170242819A1

公开(公告)日：2017-08-24

申请号：US15051750

申请日：2016-02-24

Applicant: Mellanox Technologies Ltd.

Inventor： Yuval Itkin ,  Liran Liss ,  Amir Ancel ,  Ran Sofer

IPC: G06F13/42 ,  G06F13/40 ,  G06F13/36

CPC classification number: G06F13/42 ,  G06F13/36 ,  G06F13/4027

Abstract: A method for management of a host computer that includes a management controller configured to carry out, independently of the host CPU, host management instructions contained in management packets compliant with a first data link protocol. The method includes receiving the management packets from a first network operating in accordance with the first data link protocol. The management packets are encapsulated in data packets compliant with a second data link protocol, different from the first data link protocol. The data packets are transmitted to a second network, operating in accordance with the second data link protocol. The transmitted data packets are received from the second network in a network interface controller (NIC), which is installed in the host computer and connected to the second network. The NIC decapsulates the management packets from the received data packets and passes the decapsulated management packets via a sideband connection to the management controller.

公开(公告)号：US20170201468A1

公开(公告)日：2017-07-13

申请号：US15470940

申请日：2017-03-28

Applicant: Mellanox Technologies, Ltd.

Inventor： Freddy Gabbay ,  Ido Bukshpan ,  Alon Webman ,  Miriam Menes ,  George Elias ,  Noam Katz Abramovich

IPC: H04L12/879 ,  H04L12/861

CPC classification number: H04L49/901 ,  H04L49/90 ,  H04L49/9094

Abstract: A switching device includes a plurality of ports and a switching core, which is coupled to transfer data packets between ingress and egress ports. Switching logic maintains a descriptor queue containing respective descriptors corresponding to the data packets that have been received and queued by the ports, and responsively to the respective descriptors, instructs the switching core to transfer the queued data packets between the ports. Port logic, which is associated with each port, is configured, upon receipt of a data packet from the network at the port, to signal the switching logic to place a descriptor corresponding to the data packet in the descriptor queue and, upon identifying the data packet as meeting a predefined criterion, to convey a request to the switching logic, bypassing the descriptor queue, to instruct the switching core to transfer the data packet immediately to an egress port.