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241.发明授权公开(公告)号：US11562950B2
公开(公告)日：2023-01-24
申请号：US17227030
申请日：2021-04-09
Applicant: STMicroelectronics S.r.l.
Inventor： Cristiano Gianluca Stella , Fabio Vito Coppone , Francesco Salamone
IPC: H01L23/495 , H01L23/48 , H01L23/34 , H01L23/28 , H01L21/00 , H05K7/20 , H05K7/18 , H01L23/31 , H01L23/00
Abstract: A power device for surface mounting has a leadframe including a die-attach support and at least one first lead and one second lead. A die, of semiconductor material, is bonded to the die-attach support, and a package, of insulating material and parallelepipedal shape, surrounds the die and at least in part the die-attach support and has a package height. The first and second leads have outer portions extending outside the package, from two opposite lateral surfaces of the package. The outer portions of the leads have lead heights greater than the package height, extend throughout the height of the package, and have respective portions projecting from the first base.
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242.发明申请公开(公告)号：US20230019116A1
公开(公告)日：2023-01-19
申请号：US17935542
申请日：2022-09-26
Applicant: STMICROELECTRONICS S.R.L.
Inventor： Fabio CACCIOTTO
Abstract: A control circuit for a driving an electronic switch associated with a switching node of a flyback converter includes a comparison circuit configured to generate a switch-off signal by comparing a current measurement signal with a current measurement threshold signal. A valley detection circuit is configured to generate a trigger in a trigger signal when a valley signal indicates a valley in a voltage at the switching node of the flyback converter, and a blanking circuit is configured to generate a switch-on signal by combining the trigger signal with a timer signal provide by a timer circuit. The timer signal indicates whether a blanking time-interval has elapsed.
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公开(公告)号：US20230018212A1
公开(公告)日：2023-01-19
申请号：US17838159
申请日：2022-06-10
Applicant: STMicroelectronics S.r.l.
Inventor： Giuseppe Papotto , Andrea Cavarra , Giuseppe Palmisano
IPC: H03K5/00 , H03F3/20 , G01S13/931
Abstract: In an embodiment a circuit includes frequency multiplier circuitry having input nodes configured to receive an input signal and an anti-phase version thereof, the input signal having a first frequency value, wherein the frequency multiplier circuitry is configured to produce a current signal at a second frequency value that is an even multiple of the first frequency value and a transformer including a primary side and a secondary side, wherein the primary side comprises a primary inductance coupled to the frequency multiplier circuitry to receive the current signal therefrom, wherein the secondary side is configured to provide a frequency multiplied voltage signal, and wherein the frequency multiplier circuitry and the transformer are cascaded between at least one first node and a second node, the at least one first node and the second node couplable to a supply node and ground.
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公开(公告)号：US20230017265A1
公开(公告)日：2023-01-19
申请号：US17857633
申请日：2022-07-05
Applicant: STMICROELECTRONICS S.r.l.
Inventor： Ruggero SUSELLA
IPC: H04L9/08
Abstract: One or more keys are derived from a master key by executing a plurality of encryption operations. A first encryption operation uses the master key to encrypt a plaintext input having a plurality of bytes. Multiple intermediate encryption operations are performed using a respective intermediate key generated by a previous encryption operation to encrypt respective plaintext inputs having a number of bytes. At least two bytes of a plaintext input have values based on a respective set of bits of a plurality of sets of bits of an initialization vector, wherein individual bits of the respective set of bits are introduced into respective individual bytes of the plaintext input and the respective set of bits has at least two bits and at most a number of bits equal to the number of bytes of the plaintext input.
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公开(公告)号：US11557340B2
公开(公告)日：2023-01-17
申请号：US17410141
申请日：2021-08-24
Applicant: STMicroelectronics S.r.l.
Inventor： Michele La Placa , Fabio Enrico Carlo Disegni , Federico Goller
Abstract: In an embodiment, a method includes receiving, between a positive input terminal and a negative input terminal, a supply voltage, receiving a data signal, generating, by a voltage generator in a branch of a plurality of branches, a branch current as a function of a respective driving signal and of a regulated voltage, each branch connected between the positive input terminal and the negative input terminal, selectively activating the voltage generator as a function of a respective enabling signal and providing, between a positive output terminal and a negative output terminal, the regulated voltage to one or more driving circuits.
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Patent Agency Ranking
246.发明授权公开(公告)号：US11555554B2
公开(公告)日：2023-01-17
申请号：US16842474
申请日：2020-04-07
Applicant: STMicroelectronics S.r.l.
Inventor： Enri Duqi , Lorenzo Baldo
Abstract: A microfluidic valve formed in a body having a first and a second surface; an inlet channel extending in the body from the second surface; a first transverse channel extending in the body in a transverse direction with respect to the inlet channel; and an outlet channel extending in the body from the first surface. The inlet channel, the first transverse channel and the outlet channel form a fluidic path. The microfluidic valve further has an occluding portion, formed by the body and extending over the transverse channel; and a piezoelectric actuator coupled to the occluding portion and configured to move the occluding portion from an opening position of the valve, where the occluding portion does not interfere with the fluidic path, and a closing position of the valve, where the occluding portion interferes with and interrupts the fluidic path.
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公开(公告)号：US20230009282A1
公开(公告)日：2023-01-12
申请号：US17948890
申请日：2022-09-20
Applicant: STMicroelectronics S.r.l.
Inventor： Francesco Rundo , Francesca Trenta , Sabrina Conoci , Sebastiano Battiato
IPC: A61B5/18 , B60W60/00 , A61B5/024 , A61B5/0255 , A61B5/00 , B60W40/08 , B60W50/14 , G06N3/04 , G06N3/08 , G06V20/59 , G06V40/16
Abstract: A method includes receiving a video signal that comprises a time series of images of a face of a human, wherein the images in the time series of images comprise a set of landmark points in the face, applying tracking processing to the video signal to reveal variations over time of at least one image parameter at the set of landmark points in the human face, generating a set of variation signals indicative of variations revealed at respective landmark points in the set of landmark points, applying processing to the set of variation signals, the processing comprising artificial neural network processing to produce a reconstructed PhotoPletysmoGraphy (PPG) signal, and estimating a heart rate variability of a variable heart rate of the human as a function of the reconstructed PPG signal.
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公开(公告)号：US11552573B1
公开(公告)日：2023-01-10
申请号：US17523651
申请日：2021-11-10
Applicant: STMicroelectronics S.r.l.
Inventor： Claudio Adragna , Francesco Ferrazza
Abstract: In an embodiment, a method for operating an ACF converter includes: turning on a low-side transistor that is coupled between a primary winding of a transformer and a reference terminal to cause a forward current to enter the primary winding, turning off the low-side transistor; after turning off the low-side transistor, turning on a high-side transistor that is coupled between the primary winding and a clamp capacitor to cause a reverse current to flow through the primary winding; and after turning on the high-side transistor, when an overcurrent of the reverse current is not detected, keeping the high-side transistor on for a first period of time, and turning off the high-side transistor after the first period of time, and when the overcurrent of the reverse current is detected, turning off the high-side transistor without keeping the high-side transistor on for the first period of time.
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公开(公告)号：US20230005755A1
公开(公告)日：2023-01-05
申请号：US17942843
申请日：2022-09-12
Applicant: STMicroelectronics S.r.l. , STMicroelectronics (MALTA) Ltd
Inventor： Roseanne DUCA , Dario PACI , Pierpaolo RECANATINI
IPC: H01L21/324 , H01L23/16 , H01L23/31
Abstract: A leadframe includes a die pad and a set of electrically conductive leads. A semiconductor die, having a front surface and a back surface opposed to the front surface, is arranged on the die pad with the front surface facing away from the die pad. The semiconductor die is electrically coupled to the electrically conductive leads. A package molding material is molded over the semiconductor die arranged on the die pad. A stress absorbing material contained within a cavity delimited by a peripheral wall on the front surface of the semiconductor die is positioned intermediate at least one selected portion of the front surface of the semiconductor die and the package molding material.
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公开(公告)号：US20230002924A1
公开(公告)日：2023-01-05
申请号：US17363205
申请日：2021-06-30
Applicant: STMicroelectronics S.r.l.
Inventor： Paolo CREMA
Abstract: A uniform copper-tin compound layer is electrochemically deposited on a surface of a copper-based base structure. A tin-based film is then formed on the copper-tin compound layer. The uniform copper-tin compound layer provides a barrier that effectively inhibits tin whisker growth.
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