Abstract:
Gate line driver circuitry applies an output pulse to each of several gate lines for a display element array. The circuitry has a number of gate drivers each being coupled to drive a respective one of the gate lines. Each of the gate drivers has an output stage in which a high side transistor and a low side transistor are coupled to drive the respective gate line, responsive to at least one clock signal. A pull down transistor is coupled to discharge a control electrode of the output stage. A control circuit having a cascode amplifier is coupled to drive the pull down transistor as a function of a) at least one clock signal and b) feedback from the control electrode. Other embodiments are also described and claimed.
Abstract:
A touch screen display may include gate line driver circuitry coupled to a display pixel array. The display may be provided with intra-frame pausing (IFP) capabilities, where touch or other operations may be performed during one or more intra-frame blanking intervals. In one suitable arrangement, a gate driver circuit may include multiple gate line driver segments each of which is activated by a separate gate start pulse. Each gate start pulse may only be released at the end of an IFP interval. In another suitable arrangement, dummy gate driver units may be interposed among active gate driver units. Gate output signals may propagate through the dummy gate driver units during the IFP internal. In another suitable arrangement, each active gate driver unit may be provided with a buffer portion that protects at least some transistor in the gate driver unit from undesired stress.
Abstract:
An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. Organic light-emitting diode display pixels may have combinations of oxide and silicon transistors. In a liquid crystal display, display driver circuitry may include silicon thin-film transistor circuitry and display pixels may be based on oxide thin-film transistors. A single layer or two different layers of gate metal may be used in forming silicon transistor gates and oxide transistor gates. A silicon transistor may have a gate that overlaps a floating gate structure.
Abstract:
An organic light emitting diode display includes a thin film transistor (TFT) substrate, which has TFTs for an array of pixels. Each TFT has a gate electrode, a source electrode, and a drain electrode. An organic layer is disposed over the TFT substrate. The organic layer has through-hole above the drain electrode. The display also includes pixel electrodes disposed over the organic layer. Each pixel electrode is connected to the drain electrode in the through-hole of the organic layer for each pixel. An organic light emitting diode (OLED) layer is disposed over the pixel electrode for each pixel. The organic light emitting layer is divided into pixels or sub-pixels by a pixel defining layer over the pixel electrode. The display further includes a common electrode and a conductive layer disposed over the OLED layer such that the conductive layer does not block light emission from the organic light emitting layer.
Abstract:
A method is provided for fabricating an organic light emitting diode (OLED) display. The method includes forming a thin film transistor (TFT) substrate including a first metal layer and a second metal layer. The method also includes depositing a first passivation layer over the second metal layer, and forming a third metal layer over a channel region and a storage capacitor region. The third metal layer is configured to connect to a first portion of the second metal layer that is configured to connect to the first metal layer in a first through-hole through a gate insulator and the first passivation layer. The method further includes depositing a second passivation layer over the third metal layer, and forming an anode layer over the second passivation layer. The anode is configured to connect to a second portion of the third metal layer that is configured to connect to the second metal layer in a second through-hole of the first passivation layer and the second passivation layer.
Abstract:
An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. Organic light-emitting diode display pixels may have combinations of oxide and silicon transistors. In a liquid crystal display, display driver circuitry may include silicon thin-film transistor circuitry and display pixels may be based on oxide thin-film transistors. A single layer or two different layers of gate metal may be used in forming silicon transistor gates and oxide transistor gates. A silicon transistor may have a gate that overlaps a floating gate structure.
Abstract:
An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. Organic light-emitting diode display pixels may have combinations of oxide and silicon transistors. In a liquid crystal display, display driver circuitry may include silicon thin-film transistor circuitry and display pixels may be based on oxide thin-film transistors. A single layer or two different layers of gate metal may be used in forming silicon transistor gates and oxide transistor gates. A silicon transistor may have a gate that overlaps a floating gate structure.
Abstract:
A display having data lines that can be configured between a display mode and a touch mode is disclosed. The display can have sense regions for sensing a touch or near touch on the display during the touch mode. These same regions can display graphics or data on the display during the display mode. During display mode, the data lines in the sense regions can be configured to couple to display circuitry in order to receive data signals from the circuitry for displaying. During touch mode, the data lines in the sense regions can be configured to couple to corresponding sense lines in the regions, which in turn can couple to touch circuitry, in order to transmit touch signals to the circuitry for sensing a touch or near touch. Alternatively, during touch mode, the data lines in the sense regions can be configured to couple to ground in order to transmit residual data signals to ground for discarding.
Abstract:
A method is provided for fabricating a thin-film transistor (TFT). The method includes forming a semiconductor layer over a gate insulator that covers a gate electrode, and depositing an insulator layer over the semiconductor layer, as well as etching the insulator layer to form a patterned etch-stop without losing the gate insulator. The method also includes forming a source electrode and a drain electrode over the semiconductor layer and the patterned etch-stop. The method further includes removing a portion of the semiconductor layer beyond the source electrode and the drain electrode such that a remaining portion of the semiconductor layer covers the gate insulator in a first overlapping area of the source electrode and the gate electrode and a second overlapping area of the drain electrode and gate electrode.
Abstract:
Systems including and methods for forming a backplane for an electronic display are presented. The backplane includes interlaced crystallized regions, and the interlaced crystallized regions include at least a left column of crystallized regions and a right column of crystallized regions. The left and right columns include rows of crystallized regions with gaps disposed between each of the rows. Furthermore, each crystallized region in the left column extends into a corresponding gap in the right column, and each crystallized region in the right column extends into a corresponding gap in the left column.