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    Spring, mirror device, mirror array, and optical switch
    282.
    发明授权
    Spring, mirror device, mirror array, and optical switch 有权
    弹簧，反光镜，镜阵，光开关等

    公开(公告)号：US08264758B2

    公开(公告)日：2012-09-11

    申请号：US12085487

    申请日：2006-12-26

    Applicant: Shingo Uchiyama ,  Makoto Sato ,  Fusao Shimokawa

    Inventor： Shingo Uchiyama ,  Makoto Sato ,  Fusao Shimokawa

    IPC: G02B26/08

    CPC classification number: B81B3/004 ,  B81B2201/042 ,  B81B2201/045 ,  F16F1/027 ,  F16F2230/34 ,  G02B26/0833 ,  G02B26/0841

    Abstract: A total length of members (11, 13, 15, 17, 19, 21, 23, 25) formed in an X-axis direction of a spring (1) is larger than a spring length of the spring (1) and larger than a total length of members (12, 14, 16, 18, 20, 22, 24) formed in a Y-axis direction. With this arrangement, spring constants of respective axes can be increased, and a spring constant in a direction R can be set appropriately and freely within a wider range.

    Abstract translation: 在弹簧（1）的X轴方向上形成的构件（11,13,15,17,19,21,23,25）的总长度大于弹簧（1）的弹簧长度，大于 在Y轴方向上形成的构件（12,14,16,18,20,22,24）的总长度。 通过这种布置，可以增加各轴的弹簧常数，并且可以在更宽的范围内适当且自由地设定方向R上的弹簧常数。

    METHOD AND SYSTEM FOR PACKAGING A DISPLAY
    284.
    发明申请
    METHOD AND SYSTEM FOR PACKAGING A DISPLAY 审中-公开
    用于包装显示器的方法和系统

    公开(公告)号：US20120127556A1

    公开(公告)日：2012-05-24

    申请号：US13353132

    申请日：2012-01-18

    Applicant: Brian J. Gally ,  William J. Cummings ,  Lauren Palmateer ,  Philip D. Floyd ,  Clarence Chui

    Inventor： Brian J. Gally ,  William J. Cummings ,  Lauren Palmateer ,  Philip D. Floyd ,  Clarence Chui

    IPC: G02B26/00 ,  B32B38/16

    CPC classification number: B81B7/0067 ,  B81B2201/045 ,  B81C2203/0109 ,  B81C2203/0145 ,  B81C2203/019 ,  G02B26/001

    Abstract: A package structure and method of packaging for an interferometric modulator. A transparent substrate having an interferometric modulator formed thereon is provided. A backplane is joined to the transparent substrate with a seal where the interferometric modulator is exposed to the surrounding environment through an opening in either the backplane or the seal. The opening is sealed after the transparent substrate and backplane are joined and after any desired desiccant, release material, and/or self-aligning monolayer is introduced into the package structure.

    Abstract translation: 用于干涉式调制器的封装结构和封装方法。 提供了其上形成有干涉式调制器的透明基板。 背板通过密封件连接到透明基板上，其中干涉式调制器通过背板或密封件中的开口暴露于周围环境。 在透明基板和背板接合之后，并且在任何期望的干燥剂，剥离材料和/或自对准单层被引入到包装结构中之后，将开口密封。

    VIA STRUCTURE AND METHOD THEREOF
    285.
    发明申请
    VIA STRUCTURE AND METHOD THEREOF 有权
    通过其结构和方法

    公开(公告)号：US20120019886A1

    公开(公告)日：2012-01-26

    申请号：US13166621

    申请日：2011-06-22

    Applicant: Thorbjörn Ebefors ,  Edvard Kälvesten ,  Peter Agren ,  Niklas Svedin ,  Thomas Ericson

    Inventor： Thorbjörn Ebefors ,  Edvard Kälvesten ,  Peter Agren ,  Niklas Svedin ,  Thomas Ericson

    IPC: G02B26/08 ,  H02N1/00

    CPC classification number: G02B26/0841 ,  B81B7/0006 ,  B81B2201/042 ,  B81B2201/045 ,  H01L23/481 ,  H01L2924/0002 ,  H02N1/006 ,  H01L2924/00

    Abstract: A layered micro-electronic and/or micro-mechanic structure comprises at least three alternating electrically conductive layers with insulating layers between the conductive layers. There is also provided a via in a first outer layer, said via comprising an insulated conductive connection made of wafer native material through the layer, an electrically conductive plug extending through the other layers and into said via in the first outer layer in order to provide conductivity through the layers, and an insulating enclosure surrounding said conductive plug in at least one selected layer of said other layers for insulating said plug from the material in said selected layer. It also relates to micro-electronic and/or micro-mechanic device comprising a movable member provided above a cavity such that it is movable in at least one direction. The device has a layered structure according to the invention. Methods of making such a layered MEMS structure is also provided.

    Abstract translation: 分层微电子和/或微机械结构包括在导电层之间具有绝缘层的至少三个交替导电层。 还提供了在第一外层中的通孔，所述通孔包括由穿过该层的晶片天然材料制成的绝缘导电连接，在第一外层中延伸穿过其它层并进入所述通孔的导电插塞，以便提供 通过层的导电性，以及围绕所述其它层的至少一个所选层的所述导电插塞的绝缘外壳，用于使所述插塞与所述选定层中的材料绝缘。 它还涉及微电子和/或微机械装置，其包括设置在空腔上方的可动构件，使得其可在至少一个方向上移动。 该装置具有根据本发明的分层结构。 还提供了制造这种分层MEMS结构的方法。

    Capacitive MEMS device with programmable offset voltage control
    286.
    发明授权
    Capacitive MEMS device with programmable offset voltage control 有权
    具有可编程失调电压控制的电容式MEMS器件

    公开(公告)号：US07978395B2

    公开(公告)日：2011-07-12

    申请号：US12789195

    申请日：2010-05-27

    Applicant: Daniel Felnhofer ,  Evgeni Gousev

    Inventor： Daniel Felnhofer ,  Evgeni Gousev

    IPC: G02B26/00 ,  G02B26/02

    CPC classification number: B81B3/0086 ,  B81B2201/045 ,  G02B26/001 ,  G11C23/00

    Abstract: A capacitive MEMS device is formed having a material between electrodes that traps and retains charges. The material can be realized in several configurations. It can be a multilayer dielectric stack with regions of different band gap energies or band energy levels. The dielectric materials can be trappy itself, i.e. when defects or trap sites are pre-fabricated in the material. Another configuration involves a thin layer of a conductive material with the energy level in the forbidden gap of the dielectric layer. The device may be programmed (i.e. offset and threshold voltages pre-set) by a method making advantageous use of charge storage in the material, wherein the interferometric modulator is pre-charged in such a way that the hysteresis curve shifts, and the actuation voltage threshold of the modulator is significantly lowered. During programming phase, charge transfer between the electrodes and the materials can be performed by applying voltage to the electrodes (i.e. applying electrical field across the material) or by UV-illumination and injection of electrical charges over the energy barrier. The interferometric modulator may then be retained in an actuated state with a significantly lower actuation voltage, thereby saving power.

    Abstract translation: 形成电容MEMS器件，其具有陷阱并保持电荷的电极之间的材料。 该材料可以在几种配置中实现。 它可以是具有不同带隙能量或带能级的区域的多层电介质叠层。 电介质材料本身可以是歪斜的，即当在材料中预先制造缺陷或捕获位置时。 另一种结构涉及导电材料的薄层，其中电介质层的禁止间隙具有能级。 可以通过有利地使用材料中的电荷存储的方法来对器件进行编程（即，偏移和阈值电压预设），其中干涉式调制器以滞后曲线偏移的方式预充电，并且致动电压 调制器的阈值显着降低。 在编程阶段期间，电极和材料之间的电荷转移可以通过向电极施加电压（即跨越材料施加电场）或通过UV照射和在能量屏障上注入电荷来执行。 然后干涉式调制器可以以明显更低的致动电压保持在致动状态，从而节省功率。

    ELECTROSTATIC ACTUATOR
    287.
    发明申请
    ELECTROSTATIC ACTUATOR 失效
    静电执行器

    公开(公告)号：US20110140570A1

    公开(公告)日：2011-06-16

    申请号：US12954806

    申请日：2010-11-26

    Applicant: Takayuki MASUNAGA ,  Hiroaki Yamazaki

    Inventor： Takayuki MASUNAGA ,  Hiroaki Yamazaki

    IPC: H02N1/00

    CPC classification number: H01H59/0009 ,  B81B3/007 ,  B81B2201/018 ,  B81B2201/045 ,  B81B2203/0109 ,  B81B2203/0172 ,  H02N1/006

    Abstract: According to one embodiment, an electrostatic actuator includes an electrode unit, a conductive film body unit, a plurality of first urging units, and a plurality of second urging units. The electrode unit is provided on a substrate. The conductive film body unit is provided opposing the electrode unit. The plurality of first urging units are provided at a first circumferential edge portion of the conductive film body unit to support the film body unit. The plurality of second urging units are provided at a second circumferential edge portion opposing the first circumferential edge portion to support the film body unit. The electrode unit and the conductive film body unit contact or separate by the electrode unit being set to a voltage having a prescribed value. The plurality of first urging units have mutually different rigidities, and the plurality of second urging units have mutually different rigidities.

    Abstract translation: 根据一个实施例，静电致动器包括电极单元，导电膜主体单元，多个第一推动单元和多个第二推动单元。 电极单元设置在基板上。 导电膜体单元设置成与电极单元相对。 多个第一推动单元设置在导电膜主体单元的第一圆周边缘部分处以支撑胶片主体单元。 多个第二推动单元设置在与第一周缘部相对的第二周缘部，以支撑胶片主体单元。 由电极单元接触或分离的电极单元和导电膜主体单元被设定为具有规定值的电压。 多个第一推动单元具有相互不同的刚性，并且多个第二推动单元具有相互不同的刚性。

    Manufacturing method for stress compensated X-Y gimbaled MEMS mirror array
    288.
    发明授权
    Manufacturing method for stress compensated X-Y gimbaled MEMS mirror array 有权
    应力补偿X-Y万向MEMS反射镜阵列的制造方法

    公开(公告)号：US07813028B2

    公开(公告)日：2010-10-12

    申请号：US11950400

    申请日：2007-12-04

    Applicant: Chialun Tsai ,  Jeffrey F. DeNatale

    Inventor： Chialun Tsai ,  Jeffrey F. DeNatale

    IPC: G02B26/00

    CPC classification number: G02B26/105 ,  B81B2201/045 ,  B81C1/00142 ,  B81C2201/019 ,  G02B26/0841 ,  Y10S359/90

    Abstract: A wafer-level manufacturing method produces stress compensated x-y gimbaled comb-driven MEMS mirror arrays using two SOI wafers and a single carrier wafer. MEMS structures such as comb drives, springs, and optical surfaces are formed by processing front substrate layer surfaces of the SOI wafers, bonding together the processed surfaces, and removing the unprocessed SOI layers to expose second surfaces of the front substrate layers for further wafer-level processing. The bonded SOI wafers are mounted to a surface of the carrier wafer that has been separately processed. Processing wafer surfaces may include formation of a stress compensation layer to counteract physical effects of MEMS mirrors to be formed in a subsequent step. The method may form multi-layered conductive spring structures for the mirrors, each spring having a first conducting layer for energizing a comb drive, a second conducting layer imparting a restoring force, and an insulating layer between the first and second conducting layers.

    Abstract translation: 晶片级制造方法使用两个SOI晶片和单载体晶片产生应力补偿的x-y万向节梳状驱动的MEMS反射镜阵列。 MEMS结构如梳形驱动器，弹簧和光学表面是通过处理SOI晶片的前衬底层表面，将经处理的表面结合在一起并去除未加工的SOI层以暴露前衬底层的第二表面以形成另外的晶片 - 级处理。 结合的SOI晶片被安装到已经分开处理的载体晶片的表面上。 处理晶片表面可以包括形成应力补偿层，以抵消在随后的步骤中形成的MEMS镜的物理效应。 该方法可以形成用于反射镜的多层导电弹簧结构，每个弹簧具有用于激励梳状驱动器的第一导电层，赋予恢复力的第二导电层以及第一和第二导电层之间的绝缘层。

    CAPACITIVE MEMS DEVICE WITH PROGRAMMABLE OFFSET VOLTAGE CONTROL
    289.
    发明申请
    CAPACITIVE MEMS DEVICE WITH PROGRAMMABLE OFFSET VOLTAGE CONTROL 有权
    具有可编程偏移电压控制的电容式MEMS器件

    公开(公告)号：US20100238537A1

    公开(公告)日：2010-09-23

    申请号：US12789195

    申请日：2010-05-27

    Applicant: Daniel Felnhofer ,  Evgeni Gousev

    Inventor： Daniel Felnhofer ,  Evgeni Gousev

    IPC: G02B26/00 ,  C23C14/22

    CPC classification number: B81B3/0086 ,  B81B2201/045 ,  G02B26/001 ,  G11C23/00

    Abstract: A capacitive MEMS device is formed having a material between electrodes that traps and retains charges. The material can be realized in several configurations. It can be a multilayer dielectric stack with regions of different band gap energies or band energy levels. The dielectric materials can be trappy itself, i.e. when defects or trap sites are pre-fabricated in the material. Another configuration involves a thin layer of a conductive material with the energy level in the forbidden gap of the dielectric layer. The device may be programmed (i.e. offset and threshold voltages pre-set) by a method making advantageous use of charge storage in the material, wherein the interferometric modulator is pre-charged in such a way that the hysteresis curve shifts, and the actuation voltage threshold of the modulator is significantly lowered. During programming phase, charge transfer between the electrodes and the materials can be performed by applying voltage to the electrodes (i.e. applying electrical field across the material) or by UV-illumination and injection of electrical charges over the energy barrier. The interferometric modulator may then be retained in an actuated state with a significantly lower actuation voltage, thereby saving power.

    Abstract translation: 形成电容MEMS器件，其具有陷阱并保持电荷的电极之间的材料。 该材料可以在几种配置中实现。 它可以是具有不同带隙能量或带能级的区域的多层电介质叠层。 电介质材料本身可以是歪斜的，即当在材料中预先制造缺陷或捕获位置时。 另一种结构涉及导电材料的薄层，其中电介质层的禁止间隙具有能级。 可以通过有利地使用材料中的电荷存储的方法来对器件进行编程（即，偏移和阈值电压预设），其中干涉式调制器以滞后曲线偏移的方式预充电，并且致动电压 调制器的阈值显着降低。 在编程阶段期间，电极和材料之间的电荷转移可以通过向电极施加电压（即跨越材料施加电场）或通过UV照射和在能量屏障上注入电荷来执行。 然后干涉式调制器可以以明显更低的致动电压保持在致动状态，从而节省功率。

    MEMS DEVICE WITH INTEGRATED VIA AND SPACER
    290.
    发明申请
    MEMS DEVICE WITH INTEGRATED VIA AND SPACER 有权
    具有集成通风和间隔的MEMS器件

    公开(公告)号：US20100214643A1

    公开(公告)日：2010-08-26

    申请号：US12392947

    申请日：2009-02-25

    Applicant: Robert Ostrom

    Inventor： Robert Ostrom

    IPC: G02B26/00 ,  B81B7/02 ,  B81C1/00

    CPC classification number: G02B26/0841 ,  B81B2201/045 ,  B81B2203/058 ,  B81B2207/096 ,  B81C1/00095 ,  G02B26/0866 ,  Y10T29/49002

    Abstract: A MEMS device and fabrication method are disclosed. A bottom substrate having an insulating layer sandwiched between an upper layer and a lower layer may be bonded to a device layer. One or more portions of the upper layer may be selectively removed to form one or more device cavities. Conductive vias may be formed through the lower layer at locations that underlie the one or more device cavities and electrically isolated from the lower layer. Devices may be formed from the device layer. Each device overlies a corresponding device cavity. Each device may be connected to the rest of the device layer by one or more corresponding hinges formed from the device layer. One or more electrical contacts may be formed on a back side of the lower layer. Each contact is electrically connected to a corresponding conductive via.

    Abstract translation: 公开了MEMS器件和制造方法。 具有夹在上层和下层之间的绝缘层的底部基板可以结合到器件层。 可以选择性地去除上层的一个或多个部分以形成一个或多个器件腔。 导电通孔可以在位于一个或多个器件空腔下方并且与下层电隔离的位置处通过下层形成。 设备可以从设备层形成。 每个设备覆盖相应的设备腔。 每个设备可以通过由设备层形成的一个或多个相应铰链连接到设备层的其余部分。 一个或多个电触头可以形成在下层的背面上。 每个触点电连接到相应的导电通孔。

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