公开(公告)号：USD707800S1

公开(公告)日：2014-06-24

申请号：US29449164

申请日：2013-03-14

Applicant: Chen-Chang Lin

Designer： Chen-Chang Lin

公开(公告)号：US08692359B2

公开(公告)日：2014-04-08

申请号：US13309559

申请日：2011-12-02

Applicant: Yung-Chang Lin ,  Chien-Li Kuo ,  Ming-Tse Lin ,  Sun-Chieh Chien

Inventor： Yung-Chang Lin ,  Chien-Li Kuo ,  Ming-Tse Lin ,  Sun-Chieh Chien

IPC: H01L29/40

CPC classification number: H01L21/76898 ,  H01L21/76232 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of fabricating a semiconductor device includes the following steps. A semiconductor substrate having a first side and a second side facing to the first side is provided. At least an opening is disposed in the semiconductor substrate of a protection region defined in the first side. A first material layer is formed on the first side and the second side, and the first material layer partially fills the opening. Subsequently, a part of the first material layer on the first side and outside the protection region is removed. A second material layer is formed on the first side and the second side, and the second material layer fills the opening. Then, a part of the second material layer on the first side and outside the protection region is removed. Finally, the remaining first material layer and the remaining second material layer on the first side are planarized.

Abstract translation: 制造半导体器件的方法包括以下步骤。 提供了具有面向第一面的第一面和第二面的半导体衬底。 至少一个开口设置在第一侧限定的保护区域的半导体衬底中。 在第一侧和第二侧上形成第一材料层，第一材料层部分地填充开口。 随后，去除第一侧的第一材料层和保护区域外部的一部分。 在第一侧和第二侧上形成第二材料层，并且第二材料层填充开口。 然后，去除保护区域的第一侧和外侧的第二材料层的一部分。 最后，剩余的第一材料层和第一侧的剩余的第二材料层被平坦化。

公开(公告)号：US20140037035A1

公开(公告)日：2014-02-06

申请号：US13564758

申请日：2012-08-02

Applicant: Tao Wen CHUNG ,  Chan-Hong CHERN ,  Ming-Chieh HUANG ,  Chih-Chang LIN ,  Yuwen SWEI

Inventor： Tao Wen CHUNG ,  Chan-Hong CHERN ,  Ming-Chieh HUANG ,  Chih-Chang LIN ,  Yuwen SWEI

IPC: H03D3/24

CPC classification number: H03K5/135 ,  H03H11/20 ,  H03K2005/00052 ,  H04L7/0029

Abstract: A phase interpolator for a CDR circuit produces an output clock having level transitions between the level transitions on two input clocks. The input clocks drive cross-coupled differential amplifiers with an output that can be varied in phase by variable current throttling or steering, according to an input control value. The differential amplifiers produce an output signal with a transition spanning a time between the start of a transition on the leading input clock up to the end of the transition on the lagging input clock. The output clock is linear so long as the transitions on the two input clocks overlap. Active integrators each having an amplifier with a series resistance and capacitive feedback path are coupled to each input to the cross-coupled differential amplifiers, which enhances overlap of the input clock rise times and improves the linearity of the interpolated output signal.

Abstract translation: 用于CDR电路的相位插值器产生具有在两个输入时钟上的电平转换之间的电平转换的输出时钟。 输入时钟驱动交叉耦合差分放大器，输出可根据输入控制值通过可变电流节流或转向相位变化。 差分放大器产生一个输出信号，该输出信号跨越在引导输入时钟之间的转换开始到延迟输入时钟转换结束之间的时间。 输出时钟是线性的，只要两个输入时钟的转换重叠即可。 每个具有串联电阻和电容反馈路径的放大器的积分器耦合到交叉耦合差分放大器的每个输入，这增强了输入时钟上升时间的重叠，并提高了内插输出信号的线性度。

公开(公告)号：US08629704B2

公开(公告)日：2014-01-14

申请号：US12717705

申请日：2010-03-04

Applicant: Tien Chun Yang ,  Yuwen Swei ,  Chih-Chang Lin ,  Chiang Pu

Inventor： Tien Chun Yang ,  Yuwen Swei ,  Chih-Chang Lin ,  Chiang Pu

IPC: H03L5/00

CPC classification number: H03K19/017509 ,  H03K19/018521 ,  H05K13/00 ,  Y10T29/49117

Abstract: A level shifter includes an input end being capable of receiving an input voltage signal. The input voltage signal includes a first state transition from a first voltage state to a second voltage state. An output end can output an output voltage signal having a second state transition from a third voltage state to the second voltage state corresponding to the first state transition of the input voltage signal. A driver stage is coupled between the input end and the output end. The driver stage includes a first transistor and a second transistor. Substantially immediately from a time corresponding to about a mean of voltage levels of the first voltage state and the second voltage state, the second voltage state is substantially free from being applied to a gate of the first transistor so as to substantially turn off the first transistor.

Abstract translation: 电平移位器包括能够接收输入电压信号的输入端。 输入电压信号包括从第一电压状态到第二电压状态的第一状态转变。 输出端可以输出具有从第三电压状态到对应于输入电压信号的第一状态转换的第二电压状态的第二状态转换的输出电压信号。 驱动级连接在输入端和输出端之间。 驱动器级包括第一晶体管和第二晶体管。 基本上从与第一电压状态和第二电压状态的电压电平的平均值相对应的时间基本上立即，第二电压状态基本上没有被施加到第一晶体管的栅极，以便基本上关闭第一晶体管 。

公开(公告)号：US08625240B2

公开(公告)日：2014-01-07

申请号：US13293853

申请日：2011-11-10

Applicant: Tao Wen Chung ,  Chan-Hong Chern ,  Ming-Chieh Huang ,  Chih-Chang Lin ,  Yuwen Swei

Inventor： Tao Wen Chung ,  Chan-Hong Chern ,  Ming-Chieh Huang ,  Chih-Chang Lin ,  Yuwen Swei

IPC: H02H3/22

CPC classification number: H02H9/04 ,  H01L23/60 ,  H01L27/0248 ,  H01L2924/0002 ,  H03F2200/294 ,  H03F2203/45638 ,  H03G1/0023 ,  H03K3/35613 ,  H03K19/018514 ,  H01L2924/00

Abstract: An input/output (I/O) circuit includes an electrostatic discharge (ESD) protection circuit electrically coupled with an output node of the I/O circuit. At least one inductor and at least one loading are electrically coupled in a series fashion and between the output node of the I/O circuit and a power line. A circuitry is electrically coupled with a node between the at least one inductor and the at least one loading. The circuitry is operable to increase a current flowing through the at least one inductor during a signal transition.

Abstract translation: 输入/输出（I / O）电路包括与I / O电路的输出节点电耦合的静电放电（ESD）保护电路。 至少一个电感器和至少一个负载以串联方式电耦合，并且在I / O电路的输出节点和电力线之间。 电路与所述至少一个电感器和所述至少一个负载之间的节点电耦合。 电路可操作以在信号转换期间增加流过至少一个电感器的电流。

公开(公告)号：US20130324386A1

公开(公告)日：2013-12-05

申请号：US13904494

申请日：2013-05-29

Applicant: Yao-Chang LIN

Inventor： Yao-Chang LIN

IPC: B31B49/04

CPC classification number: B31B50/00 ,  B31B70/006 ,  B31B70/10 ,  B31B70/262 ,  B31B70/642 ,  B31B70/68 ,  B31B2155/00 ,  B31B2155/0012 ,  B31B2160/10

Abstract: A bag making machine includes a feeder to unwind and feed a sheet in a first direction, a forming device to bend and fold the sheet to form a tubular body, a speed controller for controlling upstream and downstream speeds of advancement of the tubular body, a cutter to cut the tubular body into a plurality of tubular pieces, a direction changing device to change a direction of advancement of the tubular pieces so that the tubular pieces are advanced in a second direction substantially perpendicular to the first direction, a sewing device to sew and close an open bottom side of each of the tubular pieces, and a sealing device to hot press a sealing tape against the bottom side of each of the tubular pieces.

Abstract translation: 制袋机包括：向第一方向退卷并进给片材的进料器;弯曲和折叠片材以形成管状体的成形装置;用于控制管状体前进速度的上下游速度的速度控制器; 切割器将管状体切割成多个管状件，方向改变装置，以改变管状件的前进方向，使得管状件沿大致垂直于第一方向的第二方向前进;缝合装置，缝合 并且关闭每个管状件的敞开的底侧，以及密封装置，用于将密封带热压靠在每个管状件的底侧。

公开(公告)号：US08588358B2

公开(公告)日：2013-11-19

申请号：US13045788

申请日：2011-03-11

Applicant: Chan-Hong Chern ,  Chih-Chang Lin ,  Ming-Chieh Huang ,  Fu-Lung Hsueh

Inventor： Chan-Hong Chern ,  Chih-Chang Lin ,  Ming-Chieh Huang ,  Fu-Lung Hsueh

IPC: H04L7/00

CPC classification number: H04L7/033 ,  H03L7/0807 ,  H03L7/081 ,  H03L7/113 ,  H04L7/0337

Abstract: A clock and data recovery (CDR) circuit includes an inductor-capacitor voltage controlled oscillator (LCVCO) configured to generate a clock signal with a clock frequency. A delay locked loop (DLL) is configured to receive the clock signal from the LCVCO and generate multiple clock phases. A charge pump is configured to control the LCVCO. A phase detector is configured to receive a data input and the multiple clock phases from the DLL, and to control the first charge pump in order to align a data edge of the data input and the multiple clock phases.

Abstract translation: 时钟和数据恢复（CDR）电路包括被配置为产生具有时钟频率的时钟信号的电感器 - 电容器压控振荡器（LCVCO）。 延迟锁定环（DLL）被配置为从LCVCO接收时钟信号并生成多个时钟相位。 电荷泵配置为控制LCVCO。 相位检测器被配置为从DLL接收数据输入和多个时钟相位，并且控制第一电荷泵以便对准数据输入和多个时钟相位的数据沿。

公开(公告)号：US20130244727A1

公开(公告)日：2013-09-19

申请号：US13562666

申请日：2012-07-31

Applicant: Han-Chang Lin ,  Cho-Yi Lin

Inventor： Han-Chang Lin ,  Cho-Yi Lin

IPC: H04B1/38

CPC classification number: H04M1/72563 ,  H04B1/3888 ,  H04M1/0254 ,  H04M1/72575

Abstract: When a back cover of a mobile communication device with replaceable cover is replaced, the mobile communication device may perform a corresponding application or enable a special function according to the back cover. The mobile communication device includes a back cover and a body including a processing unit, a storage unit, and a second connection interface. The back cover includes an integrated circuit (IC) element and a first connection interface. The IC element has identification information. The storage unit stores at least an application and a mapping table. The mapping table records the corresponding application of each identification information. When the back cover is assembled to the body, the first connection interface is connected to the second connection interface. The processing unit receives the identification information and looks up the mapping table according the identification information. The processing unit enables the corresponding application according to the mapping table.

Abstract translation: 当替换了具有可更换盖的移动通信设备的后盖时，移动通信设备可以根据后盖执行相应的应用或启用特殊功能。 移动通信装置包括后盖和包括处理单元，存储单元和第二连接接口的主体。 后盖包括集成电路（IC）元件和第一连接接口。 IC元件具有识别信息。 存储单元至少存储应用和映射表。 映射表记录每个标识信息的相应应用。 当后盖组装到车身时，第一连接接口连接到第二连接接口。 处理单元接收标识信息，并根据识别信息查找映射表。 处理单元根据映射表启用相应的应用。

公开(公告)号：US20130236852A1

公开(公告)日：2013-09-12

申请号：US13413488

申请日：2012-03-06

Applicant: Yen-Chang LIN

Inventor： Yen-Chang LIN

IPC: A61C8/00

CPC classification number: A61C8/0075 ,  A61C8/0018 ,  A61C8/0048 ,  A61C8/0068

Abstract: A universal dental implant structure includes an implant member and a tooth cap. The implant member has an implant portion, an extended holding portion connecting to the implant portion and a coupling cavity located at one side of the extended holding portion remote from the implant portion. The implant portion is anchored in a cancellous bone and a cortical bone. The extended holding portion is extended outside the cortical bone in a range between 3 mm and 6 mm. The tooth cap has a coupling portion to couple on and fasten to the extended holding portion. The dental implant structure of the invention resolves the problem of occlusion interference in the conventional one-piece type dental implant structure and provides the advantage of withstanding high shearing force thereof, and also has the advantage of flexible assembly in the two-piece type dental implant structure through an abutment.

Abstract translation: 通用牙种植体结构包括植入物和齿盖。 植入构件具有植入部分，连接到植入部分的延伸保持部分和位于延伸保持部分远离植入部分的一侧的耦合腔。 植入部分锚固在松质骨和皮质骨中。 延伸的保持部分在皮质骨外延伸在3mm和6mm之间的范围内。 齿帽具有联接部分，用于联接并延伸到延伸保持部分。 本发明的牙种植体结构解决了传统的单件式牙种植体结构中的闭塞干扰问题，并提供了耐受其高剪切力的优点，并且还具有在两片式牙科植入物中柔性组装的优点 结构通过基台。

公开(公告)号：US08525296B1

公开(公告)日：2013-09-03

申请号：US13532792

申请日：2012-06-26

Applicant: Yung-Chang Lin ,  Chien-Li Kuo

Inventor： Yung-Chang Lin ,  Chien-Li Kuo

IPC: H01L21/02

CPC classification number: H01L29/945 ,  H01L21/76898

Abstract: The present invention provides a capacitor structure, comprising a substrate, a TSV, a dielectric layer and a doped region. The substrate includes a first surface and a second surface, which are disposed oppositely to each other. The TSV penetrates through the first surface and the second surface. The dielectric layer is disposed in the substrate and encompasses the TSV. The doped region is disposed between the dielectric layer and the substrate. The present invention further provides a method of forming the same.

Abstract translation: 本发明提供了一种电容器结构，包括衬底，TSV，电介质层和掺杂区域。 基板包括彼此相对设置的第一表面和第二表面。 TSV穿透第一表面和第二表面。 电介质层设置在衬底中并包含TSV。 掺杂区域设置在电介质层和衬底之间。 本发明还提供一种形成该方法的方法。