公开(公告)号：US20150070034A1

公开(公告)日：2015-03-12

申请号：US14021910

申请日：2013-09-09

Applicant: Ching Chu ,  Ben Choy ,  Andy Tu

Inventor： Ching Chu ,  Ben Choy ,  Andy Tu

IPC: G01R27/26

CPC classification number: H03K5/1536 ,  G01R19/175

Abstract: A capacitive parametric zero crossing detection circuit has a nonlinear voltage controlled capacitive device coupled to an input voltage to convert a zero crossing current pulse into zero crossing voltage signal.

Abstract translation: 电容参数过零检测电路具有耦合到输入电压的非线性压控电容器件，以将过零电流脉冲转换为过零电压信号。

公开(公告)号：US20150049577A1

公开(公告)日：2015-02-19

申请号：US13965490

申请日：2013-08-13

Applicant: Benedict C.K. Choy ,  Ching Chu ,  Andy Tu

Inventor： Benedict C.K. Choy ,  Ching Chu ,  Andy Tu

IPC: H03K17/16 ,  G01S7/52

CPC classification number: G01S7/52017

Abstract: An ultrasound image system has a plurality of channels. At least one of the plurality of channels has a capacitive T/R switch.

Abstract translation: 超声图像系统具有多个通道。 多个通道中的至少一个具有电容性T / R开关。

公开(公告)号：US20120239178A1

公开(公告)日：2012-09-20

申请号：US13048282

申请日：2011-03-15

Applicant: Sunny Wu ,  Chun-Hsien Lin ,  Kun-Ming Chen ,  Dung-Yian Hsieh ,  Hui-Ru Lin ,  Jo Fei Wang ,  Jong-I Mou ,  I-Ching Chu

Inventor： Sunny Wu ,  Chun-Hsien Lin ,  Kun-Ming Chen ,  Dung-Yian Hsieh ,  Hui-Ru Lin ,  Jo Fei Wang ,  Jong-I Mou ,  I-Ching Chu

IPC: G06F19/00

CPC classification number: H01L22/20 ,  G01R31/2894 ,  H01L22/14

Abstract: A method comprises computing respective regression models for each of a plurality of failure bins based on a plurality of failures identified during wafer electrical tests. Each regression model outputs a wafer yield measure as a function of a plurality of device performance variables. For each failure bin, sensitivity of the wafer yield measure to each of the plurality of device performance variables is determined, and the device performance variables are ranked with respect to sensitivity of the wafer yield measure. A subset of the device performance variables which have highest rankings and which have less than a threshold correlation with each other are selected. The wafer yield measures for each failure bin corresponding to one of the selected subset of device performance variables are combined, to provide a combined wafer yield measure. At least one new process parameter value is selected to effect a change in the one device performance variable, based on the combined wafer yield measure. The at least one new process parameter value is to be used to process at least one additional wafer.

Abstract translation: 一种方法包括基于在晶片电测试期间识别的多个故障来计算多个故障仓中的每一个的相应回归模型。 每个回归模型输出作为多个设备性能变量的函数的晶片产量测量。 对于每个故障仓，确定晶片产量测量对多个器件性能变量中的每一个的灵敏度，并且相对于晶片产量测量的灵敏度对器件性能变量进行排序。 选择具有最高排名并且彼此具有小于阈值相关性的设备性能变量的子集。 组合对应于所选择的设备性能变量子集之一的每个故障仓的晶片产量测量，以提供组合晶片产量测量。 选择至少一个新的过程参数值，以基于组合的晶片产量测量来实现一个器件性能变量的变化。 至少一个新的过程参数值将用于处理至少一个附加晶片。

公开(公告)号：US20120138963A1

公开(公告)日：2012-06-07

申请号：US13034680

申请日：2011-02-24

Applicant: Wen-Hsien Tseng ,  Sheng-Ju Ho ,  Yen-Heng Huang ,  Cheng-Han Tsao ,  Chia-Hui Pai ,  Chung-Kai Chen ,  Wei-Yuan Cheng ,  Yi-Jen Huang ,  Chung-Yi Chiu ,  Kung-Ching Chu

Inventor： Wen-Hsien Tseng ,  Sheng-Ju Ho ,  Yen-Heng Huang ,  Cheng-Han Tsao ,  Chia-Hui Pai ,  Chung-Kai Chen ,  Wei-Yuan Cheng ,  Yi-Jen Huang ,  Chung-Yi Chiu ,  Kung-Ching Chu

IPC: H01L27/15

CPC classification number: G02F1/134309 ,  G02F1/133707 ,  G02F1/133753

Abstract: A pixel structure includes a substrate, a scan line, a first data line, a second data line, a first active device, a second active device, a first pixel electrode, and a second pixel electrode. The substrate has a first unit area and a second unit area. The first pixel electrode is disposed in the first unit area and includes a first main portion and first branch portions extending from the first main portion to an edge of the first unit area. The second pixel electrode is disposed in the second unit area and includes a second main portion and second branch portions extending from the second main portion to an edge of the second unit area, wherein at least a part of the first branch portions and at least a part of the second branch portions are asymmetrically arranged at two sides of the second data line.

Abstract translation: 像素结构包括基板，扫描线，第一数据线，第二数据线，第一有源器件，第二有源器件，第一像素电极和第二像素电极。 基板具有第一单位面积和第二单位面积。 第一像素电极设置在第一单位区域中，并且包括第一主要部分和从第一主要部分延伸到第一单位区域的边缘的第一分支部分。 第二像素电极设置在第二单元区域中，并且包括第二主要部分和从第二主要部分延伸到第二单位区域的边缘的第二分支部分，其中至少一部分第一分支部分和至少一个 第二分支部分的一部分不对称地布置在第二数据线的两侧。

公开(公告)号：US07893714B2

公开(公告)日：2011-02-22

申请号：US12367310

申请日：2009-02-06

Applicant: Ching Chu

Inventor： Ching Chu

IPC: H03K19/094 ,  H03K3/00

CPC classification number: H03K17/002 ,  H03K17/693

Abstract: An integrated circuit high voltage analog switch has digital logic-level control interface circuit. A level translator is coupled to the digital logic-level control interface circuit. A plurality of output multi-channel high voltage switches is coupled to the level translator.

Abstract translation: 集成电路高压模拟开关具有数字逻辑电平控制接口电路。 电平转换器耦合到数字逻辑电平控制接口电路。 多个输出多通道高压开关耦合到电平转换器。

公开(公告)号：US07199707B2

公开(公告)日：2007-04-03

申请号：US11128346

申请日：2005-05-13

Applicant: Wen-Ching Chu

Inventor： Wen-Ching Chu

IPC: G08B1/08

CPC classification number: G08C17/02 ,  G08C23/04

Abstract: A multi-channel wireless remote control system, which has N (an integer greater than one) wireless receiving devices and N (an integer greater than one) wireless transmitting devices. The N wireless transmitting devices corresponds to the N wireless receiving devices. The N wireless transmitting devices transmit frames to the respective N wireless receiving devices by a wireless carrier. Each frame contains a start bit, a device identification field to assign a receiving device, and a data field. Accordingly, i-th (i=1 to N) wireless transmitting device uses the device identification field to assign one of the receiving devices for receiving and sends data signal to the receiving device once every Tdi time.

Abstract translation: 一种多通道无线遥控系统，其具有N（大于1的整数）无线接收设备和N（大于1的整数）无线发射设备。 N个无线发送装置对应于N个无线接收装置。 N个无线发送装置通过无线载波向各个N个无线接收装置发送帧。 每个帧包含起始位，用于分配接收设备的设备标识字段和数据字段。 因此，第i（i = 1〜N）个无线发送装置使用设备识别字段来分配接收装置中的一个，并且每Td个时间向接收装置发送数据信号一次。

公开(公告)号：US20060279210A1

公开(公告)日：2006-12-14

申请号：US11149321

申请日：2005-06-10

Applicant: Ching-Chu Chen ,  Chin-Li Tsai ,  Shu-Mei Tai

Inventor： Ching-Chu Chen ,  Chin-Li Tsai ,  Shu-Mei Tai

IPC: H01K1/50 ,  H01K1/00 ,  H01K1/02

CPC classification number: H01K1/18 ,  H01K1/14

Abstract: A tungsten-filament bulb includes a filament set inside a housing. At least two magnesium-plated filaments of the filament extend through a stem of the housing. A tip of the housing forms a minute orifice for evacuating air from the housing to create a vacuum. A light cap is secured below a stem of the housing. The light cap includes an electrical contact base electrically connected to the magnesium-plated filaments of the filament set. With a design of the above-mentioned orifice in the tip of the housing, a conventional manufacturing defect of a deformation can be avoided when fabricating the housing with a column together by heating.

Abstract translation: 钨丝灯泡包括在壳体内的灯丝组。 长丝的至少两根镀镁丝延伸穿过壳体的杆。 壳体的尖端形成用于从壳体排出空气以产生真空的微小孔。 灯罩固定在外壳的杆下方。 灯帽包括与灯丝组的镀镁丝电连接的电接点。 通过在壳体的尖端中设计上述孔口，当通过加热将柱体一起制成壳体时，可以避免常规的变形的制造缺陷。

公开(公告)号：US20050231451A1

公开(公告)日：2005-10-20

申请号：US11040753

申请日：2005-01-21

Applicant: Chia-Ching Chu ,  Li-Sen Chuang ,  Chih-Cheng Chan

Inventor： Chia-Ching Chu ,  Li-Sen Chuang ,  Chih-Cheng Chan

IPC: G09G3/36

CPC classification number: G09G3/3659 ,  G09G2300/0842 ,  G09G2300/0852 ,  G09G2320/0247 ,  G09G2330/021

Abstract: A pixel structure with multiple storage capacitors. A display unit has a transistor with a main storage capacitor coupled thereto. A storage capacitance supply device has at least one secondary storage capacitor, whose connection thereto is determined according to a driving frequency of the display unit.

Abstract translation: 具有多个存储电容器的像素结构。 显示单元具有与主存储电容器耦合的晶体管。 存储电容供给装置具有至少一个辅助存储电容器，其与其的连接根据显示单元的驱动频率来确定。

公开(公告)号：US5319266A

公开(公告)日：1994-06-07

申请号：US21436

申请日：1993-02-24

Applicant: Ching Chu ,  John Haywood

Inventor： Ching Chu ,  John Haywood

IPC: G01M11/00 ,  H04B10/07 ,  B11C27/02

CPC classification number: G01M11/3154 ,  H04B10/07

Abstract: A switched boxcar integrating circuit suitable for use with high speed data acquisition systems such as an Optical Domain Reflectometer. The boxcar integrator comprises a differential pre-amplifier stage, a sampling switch, and an integrator. The sampling switch couples the output of the pre-amplifier to the input of the integrator. The integrator includes non-inverting and inverting stages for producing a differential integrated signal. The switch samples the output of the pre-amplifier. The samples are integrated by the integrator once a sufficient number have been acquired. The sampling switch includes a switch controller to synchronize the operation of the switch with the received signals. The integrator also includes an offset compensator and a reset switch which are coupled to the integrator. The offset compensator and reset switch set the integrator to zero and also correct any offset error. A feature of the boxcar integrator according to the present invention is the variable integrator aperture which allows the response of the receiver stage in an OTDR to be matched to the characteristics of the transmit stage.

Abstract translation: 一种适用于高速数据采集系统（如光学域反射计）的开关盒式积分电路。 盒式积分器包括差分前置放大器级，采样开关和积分器。 采样开关将前置放大器的输出端耦合到积分器的输入端。 积分器包括用于产生差分积分信号的同相和反相级。 开关对前置放大器的输出进行采样。 一旦获得足够的数量，样品就被积分器集成。 采样开关包括开关控制器，以将开关的操作与所接收的信号同步。 积分器还包括耦合到积分器的偏移补偿器和复位开关。 偏移补偿器和复位开关将积分器设置为零，并且还校正任何偏移误差。 根据本发明的箱式积分器的特征是可变积分器孔径，其允许OTDR中的接收机级的响应与发射级的特性匹配。

公开(公告)号：US11348982B2

公开(公告)日：2022-05-31

申请号：US16907135

申请日：2020-06-19

Applicant: Hsia-Ching Chu ,  Pai-Chiao Cheng

Inventor： Hsia-Ching Chu ,  Pai-Chiao Cheng

IPC: H01L27/32 ,  H01L51/52

Abstract: The disclosure provides a display device, including a substrate, a plurality of power lines and a pixel define layer. The plurality of power lines disposed on the substrate. The pixel define layer is disposed on the substrate, wherein the pixel define layer includes a first opening region and a second opening region. In a top view, the first opening region is adjacent to the second opening region, the first opening region overlaps a first power line of the plurality of power lines to define a first overlapping area, the second opening region overlaps a second power line of the plurality of power lines to define a second overlapping area, and the first overlapping area is different from the second overlapping area.