Abstract:
A system and method of real-time power management for use in computer systems. The system utilization is assessed by a North bridge, and a result is transferred to a South bridge. Thereafter, through transmitting sideband signals to a voltage controller and a frequency controller by sideband pins, the North Bridge provides faster and more efficient power management performance than the system management bus (SMBUS).
Abstract:
A method and a motherboard for automatically determining the memory type. By applying the characteristics of different operational voltages for various dynamic random access memory modules, a software program is used to drive a control signal and to automatically adjust the control voltage of the dynamic random access memory. An automatic detection of the types of the dynamic random access memory is obtained. The objectives of protecting the dynamic random access memory and to allow the dynamic random access memory to operate normally can thus be achieved. The invention not only provides the detection mechanism for accessing the dynamic random access memory during the initial activation of the computer system, but also determines the voltages required by the memory module for the computer system to enter various power saving modes.
Abstract:
A computer system and a power-management method thereof are provided. The computer system has an image-reading mode, a first power-management mode and a second power-management mode, and the computer system operating in the second power-management mode consumes less power than it consumes in the first power-management mode. The computer system comprises a first portion comprising a graphics processing unit, a memory space and a display; and a second portion comprising a storage storing an image data. When the computer system operates in the image-reading mode, the image data has been transferred to the memory space from the storage, the second portion enters to the second power-management mode from the first power-management mode, and the first portion keeps in the first power-management mode, so that the graphics processing unit can display an image by the display according to the image data stored in the memory space.
Abstract:
An information access method and a computer system are provided. The computer system includes a system management bus (SMBus), a non-volatile memory, a plurality of hardware devices, a chipset, and a CPU. The hardware devices have a plurality of specific recognition information. The CPU performs a configuration process on the hardware devices through the chipset according to the standard for a SMBus protocol, so as to distribute a plurality of memory spaces in the non-volatile memory to the hardware devices. The hardware devices share the SMBus for accessing the plurality of specific recognition information in the memory spaces.
Abstract:
In a method used for initializing a first bus device and a second bus device sharing a common transmission engine of a bus, a first link of the first bus device and a second link of the second bus device to the common transmission engine are disabled when the computer system is booted. Next, the first link and the second link are enabled in order. Then, a first state updating signal from the first bus device is issued after the first link to the common transmission engine is established. Finally, a second state updating signal from the second bus device is issued after the first state updating signal is received and the second link to the common transmission engine is established.
Abstract:
An apparatus and method of flash ROM management. The apparatus comprises a storage device, a strapping component and a process unit. The storage device stores multiple address records comprising an identity and an address range associated with a flash ROM. The strapping component is configured to output a signal to determine flash ROM type. The process unit receives a memory access request with an access range from the CPU and the signal from the strapping component queries the identity by matching the access range and the address range, and finally executes an LPC 1.1 memory access instruction with the identity and the access range corresponding to the memory cycle.
Abstract:
A system and method for power management in computer systems. System status assessed by a Northbridge, and the result transferred to a Southbridge. A system control table is provided in the Southbridge, whereby power management without software control is provided.
Abstract:
An operating system switching method is provided. The operating system switching method is for a computer system comprising a control unit, a memory unit, and a storage unit, wherein the storage unit comprises a first operating system and a second operating system. The steps of the method include: loading the first operating system and the second operating system into a first memory space and a second memory space of the memory unit, respectively, and setting the first memory space and the second memory space to a working state and a standby state, respectively; and performing a first switching of the operating systems, and setting the first memory space and the second memory space to the standby state and the working state.
Abstract:
A computer system for processing data in a non-operational state and processing method thereof are provided. The computer system includes a data output unit, a data source, a data processing module and a state monitor unit. The data processing module accesses and processes data from the data source, and transmits the processed data to the data output unit. The state monitor unit monitors a power supply state of the computer system to generate a state switch signal, which indicates whether the computer system is in an operational state or a non-operational state. When the state switch signal indicates that the computer system is in a non-operational state, the data source and the data processing module receives operating voltages to access and process data.
Abstract:
A hard drive assessing method and a hard drive assessing system supporting a maximum transmission rate of a hard drive are provided, wherein the hard drive is accessed by a controller, and both the controller and the hard drive support a plurality of transmission rates. The maximum transmission rate of the hard drive is first obtained. When the controller reads data from the hard drive, the transmission rate of the controller is set to be not lower than the maximum transmission rate, and the transmission rate of the hard drive is maintained at the maximum transmission rate. When the controller writes data into the hard drive, the transmission rate of the controller is reduced to be lower than the maximum transmission rate, and the transmission rate of the hard drive is maintained at the maximum transmission rate. Thereby, the hard drive can be accessed at its maximum transmission rate.