公开(公告)号：US20080286965A1

公开(公告)日：2008-11-20

申请号：US11803282

申请日：2007-05-14

Applicant: Hsien-Ming Lee ,  Minghsing Tsai ,  Syun-Ming Jang

Inventor： Hsien-Ming Lee ,  Minghsing Tsai ,  Syun-Ming Jang

IPC: H01L21/4763

CPC classification number: H01L21/76856 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76873

Abstract: A method for fabricating an integrated circuit structure and the resulting integrated circuit structure are provided. The method includes forming a low-k dielectric layer; form an opening in the low-k dielectric layer; forming a barrier layer covering a bottom and sidewalls of the low-k dielectric layer; performing a treatment to the barrier layer in an environment comprising a treatment gas; and filling the opening with a conductive material, wherein the conductive material is on the barrier layer.

Abstract translation: 提供一种用于制造集成电路结构的方法和所得到的集成电路结构。 该方法包括形成低k电介质层; 在低k电介质层中形成开口; 形成覆盖所述低k电介质层的底部和侧壁的阻挡层; 在包括处理气体的环境中对阻挡层进行处理; 并用导电材料填充开口，其中导电材料在阻挡层上。

公开(公告)号：US20060229144A1

公开(公告)日：2006-10-12

申请号：US10907580

申请日：2005-04-06

Applicant: Hsien Ming Lee

Inventor： Hsien Ming Lee

IPC: A63B57/00

CPC classification number: A63B57/12 ,  A63B57/10

Abstract: A durable golf tee construction to prevent the loss of or damage to golf tees, allowing golf players to play many rounds of golf using only one golf tee. Breakable but connected tee prevents the tee to be damaged upon striking; a string connected two tees allowing the easy location of tee, and thus preventing loss of tee.

Abstract translation: 一个耐用的高尔夫球座建筑，以防止高尔夫球场的损失或损坏，允许高尔夫球员只使用一个高尔夫球座打高尔夫球。 可连接的三通可防止发球台受到打击而受损; 一个连接两个三通的弦，可以方便地定位三通，从而防止三通失去。

公开(公告)号：US20060027922A1

公开(公告)日：2006-02-09

申请号：US10909980

申请日：2004-08-03

Applicant: Hsien-Ming Lee ,  Jing-Cheng Lin ,  Shing-Chyang Pan ,  Ching-Hua Hsieh ,  Chao-Hsien Peng ,  Cheng-Lin Huang ,  Li-Lin Su ,  Shau-Lin Shue

Inventor： Hsien-Ming Lee ,  Jing-Cheng Lin ,  Shing-Chyang Pan ,  Ching-Hua Hsieh ,  Chao-Hsien Peng ,  Cheng-Lin Huang ,  Li-Lin Su ,  Shau-Lin Shue

IPC: H01L23/48

CPC classification number: H01L21/76834 ,  H01L21/76849 ,  H01L21/76867 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device having a nonconductive cap layer comprising a first metal element. The nonconductive cap layer comprises a first metal nitride, a first metal oxide, or a first metal oxynitride over conductive lines and an insulating material between the conductive lines. An interface region may be formed over the top surface of the conductive lines, the interface region including the metal element of the cap layer. The cap layer prevents the conductive material in the conductive lines from migrating or diffusing into adjacent subsequently formed insulating material layers. The cap layer may also function as an etch stop layer.

Abstract translation: 一种具有包括第一金属元件的非导电盖层的半导体器件。 非导电盖层包括导电线上的第一金属氮化物，第一金属氧化物或第一金属氧氮化物，以及导电线之间的绝缘材料。 界面区域可以形成在导电线的顶表面上，界面区域包括盖层的金属元件。 盖层防止导电线中的导电材料迁移或扩散到相邻的随后形成的绝缘材料层中。 盖层也可以用作蚀刻停止层。

公开(公告)号：US20050054202A1

公开(公告)日：2005-03-10

申请号：US10655972

申请日：2003-09-04

Applicant: Shing-Chyang Pan ,  Ching-Hua Hsieh ,  Jing-Cheng Lin ,  Hsien-Ming Lee ,  Cheng-Lin Huang ,  Shau-Lin Shue

Inventor： Shing-Chyang Pan ,  Ching-Hua Hsieh ,  Jing-Cheng Lin ,  Hsien-Ming Lee ,  Cheng-Lin Huang ,  Shau-Lin Shue

IPC: H01L21/285 ,  H01L21/3105 ,  H01L21/311 ,  H01L21/768

CPC classification number: H01L21/3105 ,  H01L21/28556 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/76838 ,  H01L21/76843 ,  H01L21/76873

Abstract: A method for forming a copper damascene feature including providing a semiconductor process wafer including at least one via opening formed to extend through a thickness of at least one dielectric insulating layer and an overlying trench line opening encompassing the at least one via opening to form a dual damascene opening; etching through an etch stop layer at the at least one via opening bottom portion to expose an underlying copper area; carrying out a sub-atmospheric DEGAS process with simultaneous heating of the process wafer in a hydrogen containing ambient; carrying out an in-situ sputter-clean process; and, forming a barrier layer in-situ to line the dual damascene opening.

Abstract translation: 一种用于形成铜镶嵌特征的方法，包括提供半导体工艺晶片，其包括形成为延伸穿过至少一个介电绝缘层的厚度的至少一个通孔开口，以及覆盖所述至少一个通孔开口的上覆沟槽开口，以形成双重 大马士革开幕 在所述至少一个通孔开口底部处蚀刻通过蚀刻停止层以暴露下面的铜区域; 在含氢环境中同时加热工艺晶片，进行亚低温DEGAS工艺; 进行原位溅射清洗过程; 并且原位形成阻挡层以使双镶嵌开口成线。

公开(公告)号：US08759975B2

公开(公告)日：2014-06-24

申请号：US13561826

申请日：2012-07-30

Applicant: Hsien-Ming Lee ,  Minghsing Tsai ,  Syun-Ming Jang

Inventor： Hsien-Ming Lee ,  Minghsing Tsai ,  Syun-Ming Jang

IPC: H01L23/535

CPC classification number: H01L21/76856 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76873

Abstract: A method for fabricating an integrated circuit structure and the resulting integrated circuit structure are provided. The method includes forming a low-k dielectric layer; form an opening in the low-k dielectric layer; forming a barrier layer covering a bottom and sidewalls of the low-k dielectric layer; performing a treatment to the barrier layer in an environment comprising a treatment gas; and filling the opening with a conductive material, wherein the conductive material is on the barrier layer.

Abstract translation: 提供一种用于制造集成电路结构的方法和所得到的集成电路结构。 该方法包括形成低k电介质层; 在低k电介质层中形成开口; 形成覆盖所述低k电介质层的底部和侧壁的阻挡层; 在包括处理气体的环境中对阻挡层进行处理; 并用导电材料填充开口，其中导电材料在阻挡层上。

公开(公告)号：US08721346B2

公开(公告)日：2014-05-13

申请号：US13176680

申请日：2011-07-05

Applicant: Yu-Fang Lin ,  Hsien-Ming Lee ,  Hao-Chung Lien

Inventor： Yu-Fang Lin ,  Hsien-Ming Lee ,  Hao-Chung Lien

IPC: H01R39/00

CPC classification number: H05K5/0278 ,  H01R13/60 ,  H04M1/0227 ,  H04M1/0274

Abstract: A signal transmission module is provided. The signal transmission module includes an electrical connector, a linked unit, a data connector, a sliding block, a link and a lock block. The data connector rotates and expands according to a first shaft and a first elastomer of the linked unit, and electrically connects to the electrical connector. During retraction of the data connector, the data connector pushes the sliding block. Then the sliding block moves against the lock block so that the lock block rotates. The lock block rotates to lock and secure the data connector by the lock piece, while a cam of the link moves to a secure location along an incline plane of a track of the sliding block.

Abstract translation: 提供信号传输模块。 信号传输模块包括电连接器，链接单元，数据连接器，滑动块，链接和锁定块。 数据连接器根据连接单元的第一轴和第一弹性体旋转和膨胀，并且电连接到电连接器。 在数据连接器退回期间，数据连接器推动滑块。 然后滑动块抵靠锁定块移动，使得锁定块旋转。 锁定块旋转以通过锁定件锁定并固定数据连接器，同时链节的凸轮沿着滑动块的轨道的倾斜平面移动到安全位置。

公开(公告)号：US20110126613A1

公开(公告)日：2011-06-02

申请号：US12792697

申请日：2010-06-02

Applicant: YU-FANG LIN ,  HSIEN-MING LEE ,  WEI-KER KUO

Inventor： YU-FANG LIN ,  HSIEN-MING LEE ,  WEI-KER KUO

IPC: G01M3/04

CPC classification number: G01M3/10 ,  G01M3/3281 ,  G03B17/08 ,  G03B31/00 ,  G03B43/00

Abstract: The present invention is directed to a waterproof electronic device with a test structure, including a test opening, a sealing structure and a fixation structure. The test opening is arranged on a housing of the waterproof electronic device, and is used for injecting a test fluid for detecting water leak. The sealing structure is arranged on the housing or a test fixture, and is used for holding a sealing element such that the waterproof electronic device and the test fixture may be sealed to each other when performing a leak test. The fixation structure is used for fixing the test fixture on the waterproof electronic device.

Abstract translation: 本发明涉及具有测试结构的防水电子设备，包括测试开口，密封结构和固定结构。 测试开口布置在防水电子设备的外壳上，用于注入用于检测漏水的测试流体。 密封结构设置在壳体或测试夹具上，用于保持密封元件，使得防水电子设备和测试夹具可以在进行泄漏测试时彼此密封。 固定结构用于将测试夹具固定在防水电子设备上。

公开(公告)号：US07453149B2

公开(公告)日：2008-11-18

申请号：US11024916

申请日：2004-12-28

Applicant: Cheng-Lin Huang ,  Ching-Hua Hsieh ,  Hsien-Ming Lee ,  Shing-Chyang Pan ,  Chao-Hsien Peng ,  Li-Lin Su ,  Jing-Cheng Lin ,  Shao-Lin Shue ,  Mong-Song Liang

Inventor： Cheng-Lin Huang ,  Ching-Hua Hsieh ,  Hsien-Ming Lee ,  Shing-Chyang Pan ,  Chao-Hsien Peng ,  Li-Lin Su ,  Jing-Cheng Lin ,  Shao-Lin Shue ,  Mong-Song Liang

IPC: H01L23/48

CPC classification number: H01L21/76844 ,  H01L21/76846 ,  H01L21/76862 ,  Y10S438/927

Abstract: A composite barrier layer provides superior barrier qualities and superior adhesion properties to both dielectric materials and conductive materials as the composite barrier layer extends throughout the semiconductor device. The composite barrier layer may be formed in regions where it is disposed between two conductive layers and in regions where it is disposed between a conductive layer and a dielectric material. The composite barrier layer may consist of various pluralities of layers and the arrangement of layers that form the composite barrier layer may differ as the barrier layer extends throughout different sections of the device. Amorphous layers of the composite barrier layer are generally disposed to form boundaries with dielectric materials and crystalline layers are generally disposed to form boundaries with conductive materials such as interconnect materials.

Abstract translation: 当复合阻挡层延伸穿过整个半导体器件时，复合阻挡层为介电材料和导电材料提供优异的阻挡质量和优异的粘合性能。 复合阻挡层可以形成在其设置在两个导电层之间的区域中，并且在其布置在导电层和电介质材料之间的区域中。 复合阻挡层可以由各种多个层组成，并且形成复合阻挡层的层的布置可以随着阻挡层在装置的不同部分延伸而不同。 复合阻挡层的非晶层通常设置成与电介质材料形成边界，并且通常设置结晶层以与诸如互连材料的导电材料形成边界。

公开(公告)号：US07253501B2

公开(公告)日：2007-08-07

申请号：US10909980

申请日：2004-08-03

Applicant: Hsien-Ming Lee ,  Jing-Cheng Lin ,  Shing-Chyang Pan ,  Ching-Hua Hsieh ,  Chao-Hsien Peng ,  Cheng-Lin Huang ,  Li-Lin Su ,  Shau-Lin Shue

Inventor： Hsien-Ming Lee ,  Jing-Cheng Lin ,  Shing-Chyang Pan ,  Ching-Hua Hsieh ,  Chao-Hsien Peng ,  Cheng-Lin Huang ,  Li-Lin Su ,  Shau-Lin Shue

IPC: H01L23/58 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L21/76834 ,  H01L21/76849 ,  H01L21/76867 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device having a nonconductive cap layer comprising a first metal element. The nonconductive cap layer comprises a first metal nitride, a first metal oxide, or a first metal oxynitride over conductive lines and an insulating material between the conductive lines. An interface region may be formed over the top surface of the conductive lines, the interface region including the metal element of the cap layer. The cap layer prevents the conductive material in the conductive lines from migrating or diffusing into adjacent subsequently formed insulating material layers. The cap layer may also function as an etch stop layer.

Abstract translation: 一种具有包括第一金属元件的非导电盖层的半导体器件。 非导电盖层包括导电线上的第一金属氮化物，第一金属氧化物或第一金属氧氮化物，以及导电线之间的绝缘材料。 界面区域可以形成在导电线的顶表面上，界面区域包括盖层的金属元件。 盖层防止导电线中的导电材料迁移或扩散到相邻的随后形成的绝缘材料层中。 盖层也可以用作蚀刻停止层。

公开(公告)号：US07193327B2

公开(公告)日：2007-03-20

申请号：US11042396

申请日：2005-01-25

Applicant: Chen-Hua Yu ,  Shing-Chyang Pan ,  Shau-Lin Shue ,  Ching-Hua Hsieh ,  Cheng-Lin Huang ,  Hsien-Ming Lee ,  Jing-Cheng Lin

Inventor： Chen-Hua Yu ,  Shing-Chyang Pan ,  Shau-Lin Shue ,  Ching-Hua Hsieh ,  Cheng-Lin Huang ,  Hsien-Ming Lee ,  Jing-Cheng Lin

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L23/53295 ,  H01L21/76805 ,  H01L21/76844 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An opening in a dielectric layer having a unique barrier layer structure is provided. In an embodiment, the opening is a via and a trench. The barrier layer, which may comprise one or more barrier layers, is formed such that the ratio of the thickness of the barrier layers along a sidewall approximately midway between the bottom of the trench and the top of the dielectric layer to the thickness of the barrier layers along the bottom of the trench is greater than about 0.55. In another embodiment, the ratio of the thickness of the barrier layers along a sidewall approximately midway between the bottom of the trench and the top of the dielectric layer to the thickness of the barrier layers along the bottom of the via is greater than about 1.0. An underlying conductive layer may be recessed.

Abstract translation: 提供具有独特的阻挡层结构的电介质层中的开口。 在一个实施例中，开口是通孔和沟槽。 可以形成阻挡层，其可以包括一个或多个阻挡层，使得阻挡层的厚度在沟槽的底部和电介质层的顶部之间的大致中间的侧壁与屏障的厚度之比 沿着沟槽底部的层大于约0.55。 在另一个实施例中，沿着沟槽底部和电介质层的顶部之间大约中间的侧壁的阻挡层的厚度与通孔底部的阻挡层的厚度之比大于约1.0。 潜在的导电层可以凹入。