公开(公告)号：US07884246B2

公开(公告)日：2011-02-08

申请号：US12092454

申请日：2006-11-01

Applicant: Fabrice Gallou ,  Heewon Lee ,  Chris Hugh Senanayake ,  Jinhua J. Song ,  Zhulin Tan ,  Jinghua Xu ,  Nathan K. Yee

Inventor： Fabrice Gallou ,  Heewon Lee ,  Chris Hugh Senanayake ,  Jinhua J. Song ,  Zhulin Tan ,  Jinghua Xu ,  Nathan K. Yee

IPC: C07C259/00

CPC classification number: C07C213/02 ,  C07C249/08 ,  C07C251/44 ,  C07C2601/16 ,  C07C217/84

Abstract: Disclosed is a process for preparing substituted anisidines of formula I starting from substituted cyclic hydroxy-ketones II via aromatization through a substituted oxime intermediate IV in which R is C1-C6 alkyl or halogen, and Alk is C1-C6 alkyl. The substituted anisidines of formula I have been found to be useful as intermediates in the preparation of agents for the treatment of hepatitis C viral (HCV) infections.

Abstract translation: 公开了通过芳族化通过其中R是C 1 -C 6烷基或卤素的取代的肟中间体IV和Alk是C 1 -C 6烷基的取代的环状羟基酮II制备取代的茴香胺的方法。 已经发现式I的取代的茴香醚可用作制备用于治疗丙型肝炎病毒（HCV）感染的药剂的中间体。

公开(公告)号：US10310924B2

公开(公告)日：2019-06-04

申请号：US15376227

申请日：2016-12-12

Applicant: Hyun-Seung Jei ,  Heewon Lee ,  Suejin Kim

Inventor： Hyun-Seung Jei ,  Heewon Lee ,  Suejin Kim

IPC: G06F11/07 ,  G06F11/10 ,  G11C29/52 ,  G11C16/34 ,  G11C29/04

Abstract: A read reclaim method of a storage device includes detecting, at a cycle of a random number of read operations, the number of error bits within non-selection data stored in each of a plurality of memory blocks. A memory block having the number of detected error bits, with respect to the number of read operations, increasing at a rate greater than a reference rate over one or more cycles of the random number of read operations is selected as a weak block. The number of error bits within non-selection data stored in the weak block is detected at a cycle of a fixed number of read operations. A detection is made of whether the number of error bits detected according to the fixed-number cycle is greater than or equal to a read reclaim reference. The non-selection data is data not requested by a host.

公开(公告)号：US10216422B2

公开(公告)日：2019-02-26

申请号：US15634100

申请日：2017-06-27

Applicant: Chanha Kim ,  Hyunkyo Oh ,  Oak-Ha Kim ,  Seungkyung Ro ,  Jong-Nam Baek ,  Donggi Lee ,  Jinwook Lee ,  Heewon Lee

Inventor： Chanha Kim ,  Hyunkyo Oh ,  Oak-Ha Kim ,  Seungkyung Ro ,  Jong-Nam Baek ,  Donggi Lee ,  Jinwook Lee ,  Heewon Lee

IPC: G06F12/00 ,  G06F3/06 ,  G06N3/04 ,  G06N5/04 ,  G06N99/00 ,  G06F12/02 ,  G06N3/063

Abstract: A storage device includes a nonvolatile memory device, a buffer memory, a controller and a neuromorphic chip. The neuromorphic chip is configured to generate an access classifier based on the access result information and the access environment information. The controller is configured to perform first accesses to the nonvolatile memory device using the buffer memory and to collects the access result information and the access environment information of the first accesses in the buffer memory. The controller is configured to perform a second access of the nonvolatile memory device using the buffer memory. The controller is configured to obtain a prediction result of access parameters associated with the second access by using access environment information associated with the second access and the access classifier.

公开(公告)号：US20160203047A1

公开(公告)日：2016-07-14

申请号：US14979971

申请日：2015-12-28

Applicant: HYERY NO ,  SANGKWON MOON ,  SUEJIN KIM ,  HEEWON LEE

Inventor： HYERY NO ,  SANGKWON MOON ,  SUEJIN KIM ,  HEEWON LEE

IPC: G06F11/10 ,  G11C29/52 ,  G06F3/06

CPC classification number: G06F11/1068 ,  G06F3/0604 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0679 ,  G06F11/1048 ,  G11C11/5642 ,  G11C29/42 ,  G11C29/52

Abstract: A nonvolatile memory system includes a nonvolatile memory device and a memory controller managing the nonvolatile memory device. The operation method includes receiving a read command and a read address from an external device, reading read data stored in memory cells connected to a selected word line of a selected memory block corresponding to the read address in response to the read command, and detecting and correcting error bits of the read data. The method includes estimating the number of error bits of unselected word lines on the basis of erase leaving times of memory cells connected to the unselected word lines of the selected memory block and the detected error bits, and performing read-reclaim operation on at least one word line among the selected word line and the unselected word lines on the basis of the estimated number of error bits.

Abstract translation: 非易失性存储器系统包括非易失性存储器件和管理非易失性存储器件的存储器控​​制器。 操作方法包括从外部设备接收读取命令和读取地址，响应于读取命令，读取存储在连接到与所读取的地址对应的所选择的存储器块的选定字线上的存储器单元中的读取数据， 纠正读取数据的错误位。 该方法包括：基于连接到所选择的存储器块的未选择字线的存储器单元的擦除离开时间和检测到的错误位，来估计未选择字线的错误位的数量，以及至少一个执行读取回收操作 基于所估计的错误比特数，所选字线和未选字线之间的字线。

公开(公告)号：US08996792B2

公开(公告)日：2015-03-31

申请号：US13446155

申请日：2012-04-13

Applicant: Kui-Yon Mun ,  Heewon Lee

Inventor： Kui-Yon Mun ,  Heewon Lee

IPC: G06F12/00 ,  G11C16/10 ,  G11C16/30 ,  G11C16/34

CPC classification number: G06F3/0619 ,  G06F3/0659 ,  G06F3/0688 ,  G11C16/10 ,  G11C16/30 ,  G11C16/3418 ,  G11C16/349 ,  G11C29/52

Abstract: Random sequence data is sequentially generated based on a seed assigned to a selected memory space, and one of access-requested segments of the selected memory space is logically combined with the sequentially generated random sequence data to transfer the access-requested segment. The sequentially generating and the logically combining are iteratively performed until remaining access-requested segments all transferred.

Abstract translation: 随机序列数据基于分配给所选择的存储器空间的种子顺序生成，并且所选择的存储器空间的访问请求片段中的一个被逻辑地与顺序生成的随机序列数据组合以传送访问请求片段。 迭代执行顺序生成和逻辑组合，直到所有传送的剩余访问请求片段为止。