公开(公告)号：US08409355B2

公开(公告)日：2013-04-02

申请号：US12109187

申请日：2008-04-24

Applicant: Muhammad M. Rasheed ,  Teruki Iwashita ,  Hiroshi Otake ,  Yuki Koga ,  Kazutoshi Maehara ,  Xinglong Chen ,  Sudhir Gondhalekar ,  Dmitry Lubomirsky

Inventor： Muhammad M. Rasheed ,  Teruki Iwashita ,  Hiroshi Otake ,  Yuki Koga ,  Kazutoshi Maehara ,  Xinglong Chen ,  Sudhir Gondhalekar ,  Dmitry Lubomirsky

IPC: C23C16/00 ,  C23F1/00 ,  H01L21/306

CPC classification number: C23C16/4585 ,  C23C16/4581 ,  H01J37/32082 ,  H01J37/32642 ,  H01L21/68735

Abstract: Embodiments of process kits for substrate supports of semiconductor substrate process chambers are provided herein. In some embodiments, a process kit for a semiconductor process chamber may include an annular body being substantially horizontal and having an inner and an outer edge, and an upper and a lower surface; an inner lip disposed proximate the inner edge and extending vertically from the upper surface; and an outer lip disposed proximate the outer edge and on the lower surface, and having a shape conforming to a surface of the substrate support pedestal. In some embodiments, a process kit for a semiconductor process chamber my include an annular body having an inner and an outer edge, and having an upper and lower surface, the upper surface disposed at a downward angle of between about 5-65 degrees in an radially outward direction from the inner edge toward the outer edge.

Abstract translation: 本文提供了半导体衬底处理室的衬底支撑件的工艺组件的实施例。 在一些实施例中，用于半导体处理室的处理套件可以包括基本上水平的并具有内部和外部边缘以及上部和下部表面的环形体; 靠近所述内边缘并从所述上表面垂直延伸的内唇缘; 以及设置在所述外边缘和所述下表面附近并且具有与所述基板支撑基座的表面相符的形状的外唇缘。 在一些实施例中，用于半导体处理腔室的处理套件包括具有内边缘和外边缘的环形体，并具有上表面和下表面，上表面以约5-65度的向下角度设置在 从内缘朝向外缘的径向向外方向。

公开(公告)号：US08252410B2

公开(公告)日：2012-08-28

申请号：US12204240

申请日：2008-09-04

Applicant: Muhammad M. Rasheed

Inventor： Muhammad M. Rasheed

IPC: B32B27/32

CPC classification number: C04B35/581 ,  C04B35/08 ,  C04B2235/3205 ,  C04B2235/3217 ,  C04B2235/3224 ,  C04B2235/3225 ,  C04B2235/3232 ,  C04B2235/3239 ,  C04B2235/3241 ,  C04B2235/3244 ,  C04B2235/3251 ,  C04B2235/3256 ,  C04B2235/3258 ,  C04B2235/40 ,  C04B2235/80 ,  C04B2235/94 ,  C04B2235/95 ,  C04B2235/9607 ,  C04B2235/963 ,  Y10T428/265

Abstract: Embodiments of the invention provide a method and apparatus for protecting a susceptor during a cleaning operation by loading a ceramic cover substrate containing either aluminum nitride or beryllium oxide onto the susceptor before introducing the cleaning agent into the chamber. In one embodiment, an aluminum nitride ceramic cover substrate is provided which includes an aluminum nitride ceramic wafer having a thermal conductivity of greater than 160 W/m-K, a circular-shaped geometry having a diameter within a range from about 11 inches to about 13 inches, a thickness within a range from about 0.030 inches to about 0.060 inches, and a flatness of about 0.010 inches or less. The thermal conductivity may be about 180 W/m-K, about 190 W/m-K, or greater. The thickness may be within a range from about 0.035 inches to about 0.050 inches, and the flatness may be about 0.008 inches, about 0.006 inches, or less.

Abstract translation: 本发明的实施例提供了一种用于在清洁操作期间通过将包含氮化铝或氧化铍的陶瓷覆盖基板载入到基座上来保护基座的方法和装置，然后将清洁剂引入室中。 在一个实施例中，提供了一种氮化铝陶瓷覆盖基板，其包括导热率大于160W / mK的氮化铝陶瓷晶片，直径在约11英寸至约13英寸的范围内的圆形几何形状 ，在约0.030英寸至约0.060英寸的范围内的厚度，以及约0.010英寸或更小的平坦度。 热导率可以为约180W / m-K，约190W / m-K或更大。 厚度可以在约0.035英寸至约0.050英寸的范围内，并且平坦度可以为约0.008英寸，约0.006英寸或更小。

公开(公告)号：US20110303960A1

公开(公告)日：2011-12-15

申请号：US13157164

申请日：2011-06-09

Applicant: YONG CAO ,  Xianmin Tang ,  Srinivas Gandikota ,  Wei D. Wang ,  Zhendong Liu ,  Kevin Moraes ,  Muhammad M. Rasheed ,  Thanh X. Nguyen ,  Ananthkrishna Jupudi

Inventor： YONG CAO ,  Xianmin Tang ,  Srinivas Gandikota ,  Wei D. Wang ,  Zhendong Liu ,  Kevin Moraes ,  Muhammad M. Rasheed ,  Thanh X. Nguyen ,  Ananthkrishna Jupudi

IPC: H01L29/788 ,  H01L21/283 ,  C23C14/34 ,  H01L21/3205

CPC classification number: H01L21/28079 ,  C23C14/165 ,  C23C14/345 ,  C23C14/35 ,  H01L21/28088 ,  H01L21/2855 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/78

Abstract: Embodiments described herein provide a semiconductor device and methods and apparatuses of forming the same. The semiconductor device includes a substrate having a source and drain region and a gate electrode stack on the substrate between the source and drain regions. The gate electrode stack includes a conductive film layer on a gate dielectric layer, a refractory metal nitride film layer on the conductive film layer, a silicon-containing film layer on the refractory metal nitride film layer, and a tungsten film layer on the silicon-containing film layer. In one embodiment, the method includes positioning a substrate within a processing chamber, wherein the substrate includes a source and drain region, a gate dielectric layer between the source and drain regions, and a conductive film layer on the gate dielectric layer. The method also includes depositing a refractory metal nitride film layer on the conductive film layer, depositing a silicon-containing film layer on the refractory metal nitride film layer, and depositing a tungsten film layer on the silicon-containing film layer.

Abstract translation: 本文所述的实施例提供了一种半导体器件及其形成方法和装置。 半导体器件包括在源极和漏极区域之间的衬底上具有源极和漏极区域以及栅电极堆叠的衬底。 栅极电极堆叠包括在栅极电介质层上的导电膜层，导电膜层上的难熔金属氮化物膜层，难熔金属氮化物膜层上的含硅膜层，以及硅 - 含有膜层。 在一个实施例中，该方法包括将衬底定位在处理室内，其中衬底包括源极和漏极区域，源极和漏极区域之间的栅极介电层以及栅极电介质层上的导电膜层。 该方法还包括在导电膜层上沉积难熔金属氮化物膜层，在难熔金属氮化物膜层上沉积含硅膜层，并在含硅膜层上沉积钨膜层。

公开(公告)号：US07964040B2

公开(公告)日：2011-06-21

申请号：US12265641

申请日：2008-11-05

Applicant: Muhammad M. Rasheed ,  Dmitry Lubomirsky ,  James Santosa

Inventor： Muhammad M. Rasheed ,  Dmitry Lubomirsky ,  James Santosa

IPC: B08B5/00

CPC classification number: H01L21/67069 ,  C23C16/4412 ,  H01J37/32834 ,  H01J37/32862 ,  Y10S134/902 ,  Y10T137/85978 ,  Y10T137/87571

Abstract: An exhaust foreline for purging fluids from a semiconductor fabrication chamber is described. The foreline may include a first, second and third ports independently coupled to the chamber. A semiconductor fabrication system is also described that includes a substrate chamber that has a first, second and third interface port. The system may also include a multi-port foreline that has a first, second and third port, where the first foreline port is coupled to the first interface port, the second foreline port is coupled to the second interface port, and the third foreline port is coupled to the third interface port. The system may further include an exhaust vacuum coupled to the multi-port foreline.

Abstract translation: 描述了用于从半导体制造室清洗流体的排气前沿。 前排可以包括独立地联接到室的第一，第二和第三端口。 还描述了包括具有第一，第二和第三接口端口的衬底室的半导体制造系统。 该系统还可以包括具有第一，第二和第三端口的多端口前级线，其中第一前级线路端口耦合到第一接口端口，第二前级线路端口耦合到第二接口端口，并且第三前级端口 耦合到第三接口端口。 该系统还可以包括耦合到多端口前级管线的排气真空。

公开(公告)号：US20100252417A1

公开(公告)日：2010-10-07

申请号：US12754473

申请日：2010-04-05

Applicant: Adolph Miller Allen ,  Lara Hawrylchak ,  Zhigang Xie ,  Muhammad M. Rasheed ,  Rongjun Wang ,  Xianmin Tang ,  Zhendong Liu ,  Tza-Jing Gung ,  Srinivas Gandikota ,  Mei Chang ,  Michael S. Cox ,  Donny Young ,  Kirankumar Savandaiah ,  Zhenbin Ge

Inventor： Adolph Miller Allen ,  Lara Hawrylchak ,  Zhigang Xie ,  Muhammad M. Rasheed ,  Rongjun Wang ,  Xianmin Tang ,  Zhendong Liu ,  Tza-Jing Gung ,  Srinivas Gandikota ,  Mei Chang ,  Michael S. Cox ,  Donny Young ,  Kirankumar Savandaiah ,  Zhenbin Ge

IPC: C23C14/34

CPC classification number: C23C14/564 ,  C23C14/345 ,  C23C14/3492 ,  C23C14/35 ,  C23C14/548 ,  H01J37/32642 ,  H01J37/3405 ,  H01J37/3408 ,  H01J37/3441 ,  H01J37/3455

Abstract: Embodiments of the invention generally provide a processing chamber used to perform a physical vapor deposition (PVD) process and methods of depositing multi-compositional films. The processing chamber may include: an improved RF feed configuration to reduce any standing wave effects; an improved magnetron design to enhance RF plasma uniformity, deposited film composition and thickness uniformity; an improved substrate biasing configuration to improve process control; and an improved process kit design to improve RF field uniformity near the critical surfaces of the substrate. The method includes forming a plasma in a processing region of a chamber using an RF supply coupled to a multi-compositional target, translating a magnetron relative to the multi-compositional target, wherein the magnetron is positioned in a first position relative to a center point of the multi-compositional target while the magnetron is translating and the plasma is formed, and depositing a multi-compositional film on a substrate in the chamber.

Abstract translation: 本发明的实施例通常提供用于执行物理气相沉积（PVD）工艺的处理室和沉积多组分膜的方法。 处理室可以包括：改进的RF馈送配置以减少任何驻波效应; 改进的磁控管设计，以增强RF等离子体均匀性，沉积膜组成和厚度均匀性; 改进的衬底偏置结构以改善工艺控制; 以及改进的工艺组件设计，以改善衬底临界表面附近的RF场均匀性。 该方法包括使用耦合到多组分靶的RF电源在室的处理区域中形成等离子体，相对于多组分靶物平移磁控管，其中磁控管相对于中心点位于第一位置 的多组分靶，同时磁控管正在平移并且形成等离子体，并且在腔室中的基底上沉积多组分膜。