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公开(公告)号：US08009467B2
公开(公告)日：2011-08-30
申请号：US12602230
申请日：2008-04-22
IPC分类号： G11C11/00
CPC分类号： H01L27/228 , B82Y10/00 , G11C11/1657 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C15/02 , G11C15/046
摘要： An MRAM according to the present invention has: a memory cell array; a first word line and a second word line each connected to a group of memory cells arranged in a first direction; a plurality of blocks arranged in a matrix form; a common word line connected to a group of blocks arranged in the first direction; and a bit line pair connected to a group of blocks arranged in a second direction. Each block has a plurality of memory cells, and each memory cell has a first transistor and a magnetoresistance element. Each block further has a second transistor to which the plurality of memory cells are connected in parallel. A gate of the second transistor is connected to the common word line. A gate of the first transistor is connected to the first word line. One of source/drain of the first transistor is connected to the first bit line, and the other thereof is connected to one end of the magnetoresistance element and connected to the second bit line through the second transistor. The other end of the magnetoresistance element is connected to the second word line.
摘要翻译： 根据本发明的MRAM具有：存储单元阵列; 每个连接到沿第一方向布置的一组存储器单元的第一字线和第二字线; 以矩阵形式布置的多个块; 连接到沿第一方向布置的块组的公共字线; 以及连接到沿第二方向布置的块组的位线对。 每个块具有多个存储单元，并且每个存储单元具有第一晶体管和磁阻元件。 每个块还具有多个存储单元并联连接的第二晶体管。 第二晶体管的栅极连接到公共字线。 第一晶体管的栅极连接到第一字线。 第一晶体管的源极/漏极之一连接到第一位线，而另一个连接到磁阻元件的一端，并通过第二晶体管连接到第二位线。 磁阻元件的另一端连接到第二字线。
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公开(公告)号：US07948783B2
公开(公告)日：2011-05-24
申请号：US12515898
申请日：2007-11-12
IPC分类号： G11C15/02
CPC分类号： H01L27/228 , B82Y10/00 , B82Y25/00 , G11C11/161 , G11C11/1655 , G11C11/1659 , G11C11/1673 , G11C11/1675 , H01F10/3254 , H01F10/3272 , H01L43/08
摘要： An MRAM comprises: a plurality of magnetic memory cells each having a magnetoresistive element; and a magnetic field application section. The magnetic field application section applies an offset adjustment magnetic field in a certain direction to the plurality of magnetic memory cells from outside the plurality of magnetic memory cells. Respective data stored in the plurality of magnetic memory cells become the same when the offset adjustment magnetic field is removed.
摘要翻译： MRAM包括：多个具有磁阻元件的磁存储单元; 和磁场施加部。 磁场施加部从多个磁存储单元的外部向多个磁存储单元施加一定方向的偏移调整磁场。 当去除偏移调整磁场时，存储在多个磁存储单元中的各个数据变得相同。
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公开(公告)号：US07813164B2
公开(公告)日：2010-10-12
申请号：US11661205
申请日：2005-08-26
IPC分类号： G11C11/00
CPC分类号： G11C11/15 , H01L27/228 , H01L43/08
摘要： A magneto-resistance element includes a free layer, a fixed layer and a non-magnetic layer interposed between the free layer and the fixed layer. The free layer has a first magnetic layer, a second magnetic layer, a third magnetic layer, a first non-magnetic layer interposed between the first magnetic layer and the second magnetic layer, and a second non-magnetic layer interposed between the second magnetic layer and the third magnetic layer. The first magnetic layer, the second magnetic layer and the third magnetic layer are coupled such that spontaneous magnetizations have a helical structure.
摘要翻译： 磁阻元件包括位于自由层和固定层之间的自由层，固定层和非磁性层。 自由层具有第一磁性层，第二磁性层，第三磁性层，介于第一磁性层和第二磁性层之间的第一非磁性层，以及介于第二磁性层之间的第二非磁性层 和第三磁性层。 第一磁性层，第二磁性层和第三磁性层被耦合，使得自发磁化具有螺旋结构。
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公开(公告)号：US20100238719A1
公开(公告)日：2010-09-23
申请号：US12741299
申请日：2008-10-30
CPC分类号： G11C11/1657 , G11C11/1655 , G11C11/1659 , G11C11/1673
摘要： A MRAM includes: first and second bit lines provided to extend in a first direction; a storage block including at least one magnetroresistive element for storing data; and a reading circuit. The reading circuit includes a first terminal electrically connected to the first bit line, and a second terminal electrically connected to the second bit line. The second terminal has a high impedance preventing a steady-state current from flowing into at a time of a reading operation. The reading circuit supplies a reading current from the first terminal to the first bit line at the time of the reading operation. The storage block is configured such that the reading current flows from the first bit line to the magnetroresistive element and the magnetroresistive element is connected to the second bit line at the time of the reading operation. The reading circuit controls the reading current on the basis of a voltage applied to the second terminal through the second bit line.
摘要翻译： MRAM包括：提供为沿第一方向延伸的第一和第二位线; 存储块，其包括用于存储数据的至少一个磁阻元件; 和阅读电路。 读取电路包括电连接到第一位线的第一端子和电连接到第二位线的第二端子。 第二端子具有高阻抗，防止稳态电流在读取操作时流入。 读取电路在读取操作时将读取电流从第一端子提供给第一位线。 存储块被配置为使得读取电流从第一位线流向磁阻元件，并且磁读阻元件在读取操作时连接到第二位线。 读取电路基于通过第二位线施加到第二端子的电压来控制读取电流。
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公开(公告)号：US20100182824A1
公开(公告)日：2010-07-22
申请号：US12602230
申请日：2008-04-22
IPC分类号： G11C11/02 , G11C11/416 , G11C8/00
CPC分类号： H01L27/228 , B82Y10/00 , G11C11/1657 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C15/02 , G11C15/046
摘要： An MRAM according to the present invention has: a memory cell array; a first word line and a second word line each connected to a group of memory cells arranged in a first direction; a plurality of blocks arranged in a matrix form; a common word line connected to a group of blocks arranged in the first direction; and a bit line pair connected to a group of blocks arranged in a second direction. Each block has a plurality of memory cells, and each memory cell has a first transistor and a magnetoresistance element. Each block further has a second transistor to which the plurality of memory cells are connected in parallel. A gate of the second transistor is connected to the common word line. A gate of the first transistor is connected to the first word line. One of source/drain of the first transistor is connected to the first bit line, and the other thereof is connected to one end of the magnetoresistance element and connected to the second bit line through the second transistor. The other end of the magnetoresistance element is connected to the second word line.
摘要翻译： 根据本发明的MRAM具有：存储单元阵列; 每个连接到沿第一方向布置的一组存储器单元的第一字线和第二字线; 以矩阵形式布置的多个块; 连接到沿第一方向布置的块组的公共字线; 以及连接到沿第二方向布置的块组的位线对。 每个块具有多个存储单元，并且每个存储单元具有第一晶体管和磁阻元件。 每个块还具有多个存储单元并联连接的第二晶体管。 第二晶体管的栅极连接到公共字线。 第一晶体管的栅极连接到第一字线。 第一晶体管的源极/漏极之一连接到第一位线，而另一个连接到磁阻元件的一端，并通过第二晶体管连接到第二位线。 磁阻元件的另一端连接到第二字线。
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公开(公告)号：US20100097845A1
公开(公告)日：2010-04-22
申请号：US12527993
申请日：2008-02-07
CPC分类号： G11C11/16 , B82Y10/00 , B82Y25/00 , G11C11/1655 , G11C11/1659 , G11C11/1673 , G11C11/1675 , H01L27/228 , H01L43/08
摘要： A semiconductor storage device is provided with a memory array including a plurality of memory cells. The plurality of memory cells includes: first and third memory cells arranged along one of an even-numbered row and an odd-numbered row, and a second memory cell arranged along the other. Each of the plurality of memory cells includes: a first transistor comprising first and second diffusion layers; a second transistor comprising third and fourth diffusion layers; and a magnetoresistance element having one of terminals thereof connected to an interconnection layer which provides an electrical connection between the second and third diffusion layers. The fourth diffusion layer of the first memory cell is also used as the first diffusion layer of the second memory cell. In addition, the fourth diffusion layer of the second memory cell is also used as the first diffusion layer of the third memory cell.
摘要翻译： 半导体存储装置设置有包括多个存储单元的存储器阵列。 多个存储单元包括：沿着偶数行和奇数行中的一个排列的第一和第三存储单元，以及彼此排列的第二存储单元。 多个存储单元中的每一个包括：第一晶体管，包括第一和第二扩散层; 第二晶体管，包括第三和第四扩散层; 以及一个磁阻元件，其一个端子连接到互连层，该互连层提供第二和第三扩散层之间的电连接。 第一存储单元的第四扩散层也用作第二存储单元的第一扩散层。 此外，第二存储单元的第四扩散层也用作第三存储单元的第一扩散层。
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公开(公告)号：US20090296454A1
公开(公告)日：2009-12-03
申请号：US12443349
申请日：2007-09-25
CPC分类号： H01L27/228 , B82Y10/00 , G11C11/161 , G11C11/1655 , G11C11/1657 , G11C11/1659 , G11C11/1675 , H01L43/08
摘要： A magnetic memory cell 1 is provided with a magnetic recording layer 10 which is a ferromagnetic layer and a pinned layer 30 connected with the magnetic recording layer 10 through a non-magnetic layer 20. The magnetic recording layer 10 has a magnetization inversion region 13, a first magnetization fixed region 11 and a second magnetization fixed region 12. The magnetization inversion region 13 has a magnetization whose orientation is invertible and overlaps the pinned layer 30. The first magnetization fixed region 11 is connected with a first boundary B1 in the magnetization inversion region 13 and a magnetization orientation is fixed on a first direction. The second magnetization fixed region 12 is connected with a second boundary B2 in magnetization inversion region 13 and a magnetization orientation is fixed on a second direction. The first direction and the second direction are opposite to each other.
摘要翻译： 磁存储单元1设置有磁记录层10，磁记录层10是铁磁层，和通过非磁性层20与磁记录层10连接的钉扎层30.磁记录层10具有磁化反转区域13， 第一磁化固定区域11和第二磁化固定区域12.磁化反转区域13具有其取向可反转并与被钉扎层30重叠的磁化。第一磁化固定区域11与磁化反转中的第一边界B1连接 区域13和磁化取向在第一方向固定。 第二磁化固定区域12与磁化反转区域13中的第二边界B2连接，并且磁化取向固定在第二方向上。 第一方向和第二方向彼此相反。
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28.发明授权公开(公告)号：US07184301B2
公开(公告)日：2007-02-27
申请号：US10702655
申请日：2003-11-07
IPC分类号： G11C11/00
CPC分类号： G11C11/16 , G11C2213/74 , G11C2213/79
摘要： In a magnetic random access memory, a memory cell includes a magnetic field generating section having an extension wiring line, and connected with a first selected bit line, a conductive pattern, and a magnetic resistance element having a spontaneous magnetization, storing a data and connected between the extension wiring line and the conductive pattern. In a data write operation into the memory cell, a write data is written in the magnetic resistance element of the memory cell by a write electric current which flows through the extension wiring line of the magnetic field generating section of the memory cell, and a value of the write data is determined based on a direction of the write electric current. In a data read operation from the memory cell, a read electric current flows through the extension wiring line of the magnetic field generating section and the magnetic resistance element in the memory cell. A memory cell array section includes the memory cells arranged in a matrix, and each memory cell is connected with a first word line and a first bit line at least, the gate section.
摘要翻译： 在磁性随机存取存储器中，存储单元包括具有扩展布线的磁场产生部分，并与第一选定的位线，导电图案和具有自发磁化的磁阻元件连接，存储数据并连接 在延伸布线和导电图案之间。 在对存储单元的数据写入操作中，通过流过存储单元的磁场产生部分的延长布线的写入电流将写数据写入存储单元的磁阻元件， 基于写入电流的方向来确定写入数据。 在来自存储单元的数据读取操作中，读取的电流流过存储单元中的磁场产生部分的延伸布线和磁阻元件。 存储单元阵列部分包括以矩阵形式布置的存储器单元，并且每个存储单元至少与第一字线和第一位线连接，栅极部分。
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公开(公告)号：US20060098477A1
公开(公告)日：2006-05-11
申请号：US10523198
申请日：2003-07-28
申请人： Tadahiko Sugibayashi , Takeshi Honda , Noboru Sakimura , Hisao Matsutera , Atsushi Kamijo , Kenichi Shimura
发明人： Tadahiko Sugibayashi , Takeshi Honda , Noboru Sakimura , Hisao Matsutera , Atsushi Kamijo , Kenichi Shimura
IPC分类号： G11C11/00
CPC分类号： G11C11/16
摘要： A magnetic random access memory is composed of a plurality of first signal lines provided to extend in a first direction, a plurality of second signal lines provided to extend in a second direction substantially perpendicular to the first direction, a plurality of memory cells respectively provided at the intersections of the plurality of first signal lines and the plurality of second signal lines, and a plurality of magnetic structures respectively provided to the plurality of memory cells. Each of the plurality of memory cells has a magneto-resistance element containing a spontaneous magnetization layer which has a first threshold function, and the direction of the spontaneous magnetization of the spontaneous magnetization layer is reversed when an element applied magnetic field having the intensity equal to or larger than a first threshold function value is applied. Each of the plurality of magnetic structures has a second threshold function, and generates a magnetic structure magnetic field in response to a structure-applied magnetic field. When the structure-applied magnetic field has the intensity equal to or larger than the second threshold function value, a third magnetic field is generated as the magnetic structure magnetic field. When the structure applied magnetic field has the intensity less than the second threshold function value, a fourth magnetic field is generated which is weaker than the third magnetic field as the magnetic structure magnetic field. A first write current supplied to one of the plurality of first signal lines as a first selected signal line, and a first magnetic field is generated. A second write current is supplied to one of the plurality of second signal lines as a second selected signal line, and a second magnetic field is generated. A first synthetic magnetic field of the first magnetic field and the second magnetic field is applied to the magnetic structure as the structure applied magnetic field. The element applied magnetic field having the intensity equal to or larger than the first threshold function value is applied to the selected memory cell provided at the intersection of the first selected signal line and the second selected signal line. A second synthetic magnetic field of the first synthetic magnetic field and the magnetic structure magnetic field is generated as the element applied magnetic field such that the element applied magnetic field having the intensity less than the first threshold function value is applied to each of non-selected memory cells other than the selected memory cell.
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公开(公告)号：US20130182501A1
公开(公告)日：2013-07-18
申请号：US13824888
申请日：2011-12-06
CPC分类号： H01L27/228 , G11C11/161 , G11C11/1653 , G11C11/1655 , G11C11/1657 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C2213/74 , G11C2213/79 , H01L43/12
摘要： A magnetoresistive element 10 having a memory cell 100 according to the present invention contains a first lower terminal n1 and a second lower terminal n2 respectively connected to both ends of a conductive layer 3 whose longitudinal direction is different from the column direction (X direction). Further, the gates of the first transistors M1 respectively included in two memory cells among the plurality of memory cells 100 and adjacent to each other in a row direction (Y direction) are commonly connected to a first word line 14. As a result, without increase of the cell area, it becomes possible to reserve a margin in the dimension of the cell structure or in the process for MRMA.
摘要翻译： 具有根据本发明的存储单元100的磁阻元件10包含分别连接到纵向方向不同于列方向（X方向）的导电层3的两端的第一下端子n1和第二下端子n2。 此外，分别包括在多个存储单元100中并且在行方向（Y方向）上彼此相邻的两个存储单元中的第一晶体管M1的栅极共同连接到第一字线14.结果，没有 增加单元面积，可以在单元结构的尺寸或MRMA的处理中保留余量。
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