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29 条记录 (耗时 0.03 秒)

    SEMICONDUCTOR MEMORY DEVICE
    21.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 有权
    半导体存储器件

    公开(公告)号：US20090141569A1

    公开(公告)日：2009-06-04

    申请号：US12367871

    申请日：2009-02-09

    申请人： Koji NII ,  Shigeki Obayashi ,  Hiroshi Makino ,  Koichiro Ishibashi ,  Hirofumi Shinohara

    发明人： Koji NII ,  Shigeki Obayashi ,  Hiroshi Makino ,  Koichiro Ishibashi ,  Hirofumi Shinohara

    IPC分类号： G11C11/416 ,  G11C5/14 ,  G11C7/00 ,  G11C8/00

    CPC分类号： G11C11/419 ,  G11C5/063 ,  G11C11/412

    摘要： Cell power supply lines are arranged for memory cell columns, and adjust impedances or voltage levels of the cell power supply lines according to the voltage levels of bit lines in the corresponding columns, respectively. In the data write operation, the cell power supply line is forced into a floating state according to the bit line potential on a selected column and has the voltage level changed, and a latching capability of a selected memory cell is reduced to write data fast. Even with a low power supply voltage, a static semiconductor memory device that can stably perform write and read of data is implemented.

    摘要翻译： 单元电源线被布置用于存储单元列，并且分别根据相应列中的位线的电压电平来调整单元电源线的阻抗或电压电平。 在数据写入操作中，根据所选列的位线电位将单元电源线强制为浮置状态，并且电压电平改变，并且减小所选存储单元的锁存能力以快速写入数据。 即使使用低电源电压，也可以实现能够稳定地执行数据的写入和读取的静态半导体存储器件。

    Semiconductor device
    22.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08681527B2

    公开(公告)日：2014-03-25

    申请号：US12938001

    申请日：2010-11-02

    申请人： Shigeki Obayashi

    发明人： Shigeki Obayashi

    IPC分类号： G11C17/14

    CPC分类号： G11C17/16 ,  G11C17/18

    摘要： To provide a semiconductor device capable of reducing the line width of a fuse.In the semiconductor device, a dummy fuse is provided adjacent to a fuse, each wiring width of the fuse and the dummy fuse is set to the minimum line width, and the interval between the fuse and the dummy fuse is set to the minimum interval. Consequently, the exposure condition of the fuse and the dummy fuse is optimized by OPC, and therefore, it is possible to form the fuse with the minimum line width.

    摘要翻译： 提供能够减小保险丝的线路宽度的半导体器件。 在半导体装置中，与保险丝相邻设置虚拟熔丝，将熔丝和虚拟熔丝的各布线宽度设定为最小线宽，将熔丝和虚拟熔丝之间的间隔设定为最小间隔。 因此，保险丝和虚拟保险丝的曝光条件由OPC优化，因此可以形成具有最小线宽的保险丝。

    SEMICONDUCTOR MEMORY DEVICE THAT CAN STABLY PERFORM WRITING AND READING WITHOUT INCREASING CURRENT CONSUMPTION EVEN WITH A LOW POWER SUPPLY VOLTAGE
    23.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE THAT CAN STABLY PERFORM WRITING AND READING WITHOUT INCREASING CURRENT CONSUMPTION EVEN WITH A LOW POWER SUPPLY VOLTAGE 有权
    半导体存储器件，即使在低功耗电压下也能稳定地执行写入和读取，而不会增加电流消耗

    公开(公告)号：US20110273952A1

    公开(公告)日：2011-11-10

    申请号：US13186769

    申请日：2011-07-20

    申请人： Koji NII ,  Shigeki Obayashi ,  Hiroshi Makino ,  Koichiro Ishibashi ,  Hirofumi Shinohara

    发明人： Koji NII ,  Shigeki Obayashi ,  Hiroshi Makino ,  Koichiro Ishibashi ,  Hirofumi Shinohara

    IPC分类号： G11C5/14

    CPC分类号： G11C11/419 ,  G11C5/063 ,  G11C11/412

    摘要： Cell power supply lines are arranged for memory cell columns, and adjust impedances or voltage levels of the cell power supply lines according to the voltage levels of bit lines in the corresponding columns, respectively. In the data write operation, the cell power supply line is forced into a floating state according to the bit line potential on a selected column and has the voltage level changed, and a latching capability of a selected memory cell is reduced to write data fast. Even with a low power supply voltage, a static semiconductor memory device that can stably perform write and read of data is implemented.

    摘要翻译： 单元电源线被布置用于存储单元列，并且分别根据相应列中的位线的电压电平来调整单元电源线的阻抗或电压电平。 在数据写入操作中，根据所选列的位线电位将单元电源线强制为浮置状态，并且电压电平改变，并且减小所选存储单元的锁存能力以快速写入数据。 即使使用低电源电压，也可以实现能够稳定地执行数据的写入和读取的静态半导体存储器件。

    SEMICONDUCTOR DEVICE
    25.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20080164969A1

    公开(公告)日：2008-07-10

    申请号：US11958360

    申请日：2007-12-17

    申请人： Kazushi Kono ,  Takeshi Iwamoto ,  Hisayuki Kato ,  Shigeki Obayashi ,  Toshiaki Yonezu

    发明人： Kazushi Kono ,  Takeshi Iwamoto ,  Hisayuki Kato ,  Shigeki Obayashi ,  Toshiaki Yonezu

    IPC分类号： H01H37/76

    CPC分类号： H01L23/5256 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The semiconductor device which has an electric straight line-like fuse with a small occupying area is offered.A plurality of projecting portions 10f are formed in the position shifted from the middle position of electric fuse part 10a, and, more concretely, are formed in the position distant from via 10e and near via 10d. A plurality of projecting portions 20f are formed in the position shifted from the middle position of electric fuse part 20a, and, more concretely, are formed in the position distant from via 20d and near 20e. That is, projecting portions 10f and projecting portions 20f are arranged in the shape of zigzag.

    摘要翻译： 提供具有小占用面积的电直线状熔断器的半导体器件。 多个突出部分10f形成在从电熔丝部分10a的中间位置偏移的位置，更具体地，形成在远离通孔10e和靠近通孔10d的位置。 多个突出部分20f形成在从电熔丝部分20a的中间位置移位的位置，更具体地，形成在远离通孔20d和靠近20e的位置。 也就是说，突出部分10f和突出部分20f被布置成Z字形。