公开(公告)号：US20070209930A1

公开(公告)日：2007-09-13

申请号：US11614022

申请日：2006-12-20

Applicant: Thai Cheng Chua ,  Alex M. Paterson ,  Steven Hung ,  Patricia M. Liu ,  Tatsuya Sato ,  Valentin Todorow ,  John P. Holland

Inventor： Thai Cheng Chua ,  Alex M. Paterson ,  Steven Hung ,  Patricia M. Liu ,  Tatsuya Sato ,  Valentin Todorow ,  John P. Holland

IPC: C23C14/00

CPC classification number: C23C8/10 ,  C23C8/36 ,  C23C14/021 ,  C23C14/027 ,  C23C14/48 ,  C23C14/5806 ,  C23C14/5826 ,  H01J37/32082 ,  H01J37/32146 ,  H01J37/32165 ,  H01L21/67207

Abstract: The present invention generally provides methods and apparatuses that are adapted to form a high quality dielectric gate layer on a substrate. Embodiments contemplate a method wherein a metal plasma treatment process is used in lieu of a standard nitridization process to form a high dielectric constant layer on a substrate. Embodiments further contemplate an apparatus adapted to “implant” metal ions of relatively low energy in order to reduce ion bombardment damage to the gate dielectric layer, such as a silicon dioxide layer and to avoid incorporation of the metal atoms into the underlying silicon. In general, the process includes the steps of forming a high-k dielectric and then terminating the surface of the deposited high-k material to form a good interface between the gate electrode and the high-k dielectric material. Embodiments of the invention also provide a cluster tool that is adapted to form a high-k dielectric material, terminate the surface of the high-k dielectric material, perform any desirable post treatment steps, and form the polysilicon and/or metal gate layers.

Abstract translation: 本发明通常提供适于在衬底上形成高质量电介质栅极层的方法和装置。 实施例考虑了一种方法，其中使用金属等离子体处理工艺代替标准氮化工艺以在衬底上形成高介电常数层。 实施例进一步考虑了一种适于“植入”相对较低能量的金属离子的装置，以便减少对诸如二氧化硅层的栅极介电层的离子轰击损伤，并避免将金属原子并入到下面的硅中。 通常，该方法包括以下步骤：形成高k电介质，然后终止沉积的高k材料的表面，以在栅电极和高k电介质材料之间形成良好的界面。 本发明的实施例还提供一种簇工具，其适于形成高k电介质材料，终止高k电介质材料的表面，执行任何期望的后处理步骤，并形成多晶硅和/或金属栅极层。

公开(公告)号：US20060000805A1

公开(公告)日：2006-01-05

申请号：US10880754

申请日：2004-06-30

Applicant: Valentin Todorow ,  John Holland ,  Michael Willwerth

Inventor： Valentin Todorow ,  John Holland ,  Michael Willwerth

IPC: B44C1/22 ,  C23F1/00

CPC classification number: C23F4/00 ,  C23F1/08 ,  H01J37/321 ,  H01J37/32633 ,  H01L21/67069

Abstract: A method and apparatus for etching a substrate using a spatially modified plasma is provided herein. In one embodiment, the method includes providing a process chamber having a plasma stabilizer disposed above a substrate support pedestal. A substrate is placed upon the pedestal. A process gas is introduced into the process chamber and a plasma is formed from the process gas. The substrate is etched with a plasma having an ion density to radical density ratio defined by the plasma stabilizer.

公开(公告)号：US07645710B2

公开(公告)日：2010-01-12

申请号：US11683984

申请日：2007-03-08

Applicant: Christopher Sean Olsen ,  Thai Cheng Chua ,  Steven Hung ,  Patricia M. Liu ,  Tatsuya Sato ,  Alex M. Paterson ,  Valentin Todorow ,  John P. Holland

Inventor： Christopher Sean Olsen ,  Thai Cheng Chua ,  Steven Hung ,  Patricia M. Liu ,  Tatsuya Sato ,  Alex M. Paterson ,  Valentin Todorow ,  John P. Holland

IPC: H01L21/31 ,  H01L21/469

CPC classification number: H01L21/02175 ,  H01J37/32082 ,  H01J37/32146 ,  H01L21/02148 ,  H01L21/02197 ,  H01L21/02266 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/31155 ,  H01L21/3144 ,  H01L21/316 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/513

Abstract: The present invention generally provides methods and apparatuses that are adapted to form a high quality dielectric gate layer on a substrate. Embodiments contemplate a method wherein a metal plasma treatment process is used in lieu of a standard nitridization process to form a high dielectric constant layer on a substrate. Embodiments further contemplate an apparatus adapted to “implant” metal ions of relatively low energy in order to reduce ion bombardment damage to the gate dielectric layer, such as a silicon dioxide layer and to avoid incorporation of the metal atoms into the underlying silicon. In general, the process includes the steps of forming a high-k dielectric and then terminating the surface of the deposited high-k material to form a good interface between the gate electrode and the high-k dielectric material.

Abstract translation: 本发明通常提供适于在衬底上形成高质量电介质栅极层的方法和装置。 实施例考虑了一种方法，其中使用金属等离子体处理工艺代替标准氮化工艺以在衬底上形成高介电常数层。 实施例进一步考虑了一种适于“植入”相对较低能量的金属离子的装置，以便减少对诸如二氧化硅层的栅极介电层的离子轰击损伤，并避免将金属原子并入到下面的硅中。 通常，该方法包括以下步骤：形成高k电介质，然后终止沉积的高k材料的表面，以在栅电极和高k电介质材料之间形成良好的界面。

公开(公告)号：US20070247073A1

公开(公告)日：2007-10-25

申请号：US11410697

申请日：2006-04-24

Applicant: Alexander Paterson ,  Valentin Todorow ,  Theodoros Panagopoulos ,  Brian Hatcher ,  Dan Katz ,  Edward Hammond ,  John Holland ,  Alexander Matyushkin

Inventor： Alexander Paterson ,  Valentin Todorow ,  Theodoros Panagopoulos ,  Brian Hatcher ,  Dan Katz ,  Edward Hammond ,  John Holland ,  Alexander Matyushkin

IPC: H01J7/24

CPC classification number: H01J37/32165 ,  H01J37/32091 ,  H01J37/321 ,  H01J37/32174

Abstract: A plasma reactor for processing a workpiece includes a reactor chamber and a workpiece support within the chamber, the chamber having a ceiling facing the workpiece support, a capacitively coupled plasma source power applicator comprising a source power electrode at one of: (a) the ceiling (b) the workpiece support, and plural VHF power generators of different fixed frequencies coupled to the capacitively coupled source power applicator, and a controller for independently controlling the power output levels of the plural VHF generators so as to control an effective VHF frequency applied to the source power electrode. In a preferred embodiment, the reactor further includes a plasma bias power applicator that includes a bias power electrode in the workpiece support and one or more RF bias power generators of different frequencies coupled to the plasma bias power applicator.

Abstract translation: 一种用于处理工件的等离子体反应器包括反应室和腔室内的工件支撑件，腔室具有面向工件支撑件的天花板，电容耦合的等离子体源功率施加器，其包括源功率电极，其特征在于：（a）天花板 （b）工件支撑件，以及耦合到电容耦合的源功率施加器的不同固定频率的多个甚高频发电机，以及用于独立地控制多个VHF发生器的功率输出电平的控制器，以便控制施加到 源极电极。 在优选实施例中，反应器还包括等离子体偏置功率施加器，其包括工件支撑件中的偏置功率电极和耦合到等离子体偏置功率施加器的不同频率的一个或多个RF偏置功率发生器。

公开(公告)号：US20070212895A1

公开(公告)日：2007-09-13

申请号：US11614019

申请日：2006-12-20

Applicant: Thai Cheng CHUA ,  Steven Hung ,  Patricia M. Liu ,  Tatsuya Sato ,  Alex M. Paterson ,  Valentin Todorow ,  John P. Holland

Inventor： Thai Cheng CHUA ,  Steven Hung ,  Patricia M. Liu ,  Tatsuya Sato ,  Alex M. Paterson ,  Valentin Todorow ,  John P. Holland

IPC: H01L21/31

CPC classification number: H01L21/02175 ,  H01J37/32082 ,  H01J37/32146 ,  H01L21/02148 ,  H01L21/02266 ,  H01L21/0234 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/31155 ,  H01L21/3144 ,  H01L21/316 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/513

Abstract: The present invention generally provides methods and apparatuses that are adapted to form a high quality dielectric gate layer on a substrate. Embodiments contemplate a method wherein a metal plasma treatment process is used in lieu of a standard nitridization process to form a high dielectric constant layer on a substrate. Embodiments further contemplate an apparatus adapted to “implant” metal ions of relatively low energy in order to reduce ion bombardment damage to the gate dielectric layer, such as a silicon dioxide layer and to avoid incorporation of the metal atoms into the underlying silicon. In general, the process includes the steps of forming a high-k dielectric and then terminating the surface of the deposited high-k material to form a good interface between the gate electrode and the high-k dielectric material. Embodiments of the invention also provide a cluster tool that is adapted to form a high-k dielectric material, terminate the surface of the high-k dielectric material, perform any desirable post treatment steps, and form the polysilicon and/or metal gate layers.

Abstract translation: 本发明通常提供适于在衬底上形成高质量电介质栅极层的方法和装置。 实施例考虑了一种方法，其中使用金属等离子体处理工艺代替标准氮化工艺以在衬底上形成高介电常数层。 实施例进一步考虑了一种适于“植入”相对较低能量的金属离子的装置，以便减少对诸如二氧化硅层的栅极介电层的离子轰击损伤，并避免将金属原子并入到下面的硅中。 通常，该方法包括以下步骤：形成高k电介质，然后终止沉积的高k材料的表面，以在栅电极和高k电介质材料之间形成良好的界面。 本发明的实施例还提供一种簇工具，其适于形成高k电介质材料，终止高k电介质材料的表面，执行任何期望的后处理步骤，并形成多晶硅和/或金属栅极层。